diff options
author | Julius Werner <jwerner@chromium.org> | 2014-11-10 21:37:12 -0800 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 20:50:38 +0200 |
commit | 5016820cc95697151552c64c14ca1e06013a881f (patch) | |
tree | 7253482caebe2589d51d73d8979b598e22b0e73a /src/northbridge/amd/lx/pll_reset.c | |
parent | 63451c73bd8fc587247b2e75587b1137fdbebf38 (diff) |
veyron: Adapt to new board revisions
This patch adds support for Pinky rev3 (board ID 2) and Jerry rev2: the
power button GPIO changed polarity to low, the 5V_DRV pin for USB power
was moved to the AP again (welcome back!), and the EMMC_RST_L is now
finally on a port with the right IO voltage so we don't need any weird
pull-up tricks anymore. Since there are very few Jerry rev1s around,
we'll just move it over to the new code directly without introducing
board ID differences (also, because I have no idea how they stuffed it
this time... is this one actually called rev2?).
BRANCH=None
BUG=None
TEST=Still boots on my Pinky rev2, though that doesn't say much.
Change-Id: Id11044cedcaac5a4ae07e696893823925107a6db
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 55344a9518ff04edcef01bcd40817e9e4b613717
Original-Change-Id: Iddee360fbda357ecde4ae5fbb5c3a01fe0c22474
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/229010
Original-Reviewed-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/9551
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/amd/lx/pll_reset.c')
0 files changed, 0 insertions, 0 deletions