diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-08-07 12:16:56 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-08-09 15:51:10 +0000 |
| commit | 64f6b71af5443ac4e1126dc5f5202a1bc8657b31 (patch) | |
| tree | a9dd78971edaf050f8a215332755b1a0f55d6cf1 /src/northbridge/amd/amdmct/wrappers | |
| parent | bc0ec507f2183e28c9b45c34c46ce93ca070aed6 (diff) | |
src/northbridge: Fix typo
Change-Id: I00094028036f33892362b935899e1bceef1da625
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/27911
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/wrappers')
| -rw-r--r-- | src/northbridge/amd/amdmct/wrappers/mcti_d.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdmct/wrappers/mcti_d.c b/src/northbridge/amd/amdmct/wrappers/mcti_d.c index 66730fc7aa..3d9ff3ec14 100644 --- a/src/northbridge/amd/amdmct/wrappers/mcti_d.c +++ b/src/northbridge/amd/amdmct/wrappers/mcti_d.c @@ -169,7 +169,7 @@ u16 mctGet_NVbits(u8 index) break; case NV_SPDCHK_RESTRT: val = 0; /* Exit current node initialization if any DIMM has SPD checksum error */ - //val = 1; /* Ignore faulty SPD checksum (DIMM will still be disabled), continue current node intialization */ + //val = 1; /* Ignore faulty SPD checksum (DIMM will still be disabled), continue current node initialization */ //val = 2; /* Override faulty SPD checksum (DIMM will be enabled), continue current node intialization */ if (get_option(&nvram, "dimm_spd_checksum") == CB_SUCCESS) |