nb/amd/fam10: Drop support

Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which this platform lacks.

Change-Id: If36ef0749dbb661f731fb04829bd7e2202ebb422
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36962
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

1 files changed, 0 insertions, 45 deletions

diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c b/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c
deleted file mode 100644
index 3cb75675df..0000000000
--- a/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2010 Advanced Micro Devices, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <stdint.h>
-
-#include "mct_d.h"
-#include "mct_d_gcc.h"
-
-void mct_BeforeDQSTrainSamp(struct DCTStatStruc *pDCTstat)
-{
-	u32 val;
-
-	if (pDCTstat->LogicalCPUID & AMD_DR_Bx) {
-		Set_NB32(pDCTstat->dev_dct, 0x98, 0x0D004007);
-		val = Get_NB32(pDCTstat->dev_dct, 0x9C);
-		val |= 0x3FF;
-		Set_NB32(pDCTstat->dev_dct, 0x9C, val);
-		Set_NB32(pDCTstat->dev_dct, 0x98, 0x4D0F4F07);
-
-		Set_NB32(pDCTstat->dev_dct, 0x198, 0x0D004007);
-		val = Get_NB32(pDCTstat->dev_dct, 0x19C);
-		val |= 0x3FF;
-		Set_NB32(pDCTstat->dev_dct, 0x19C, val);
-		Set_NB32(pDCTstat->dev_dct, 0x198, 0x4D0F4F07);
-	}
-}
-
-void mct_ExtMCTConfig_Bx(struct DCTStatStruc *pDCTstat)
-{
-	if (pDCTstat->LogicalCPUID & (AMD_DR_Bx)) {
-		Set_NB32(pDCTstat->dev_dct, 0x11C, 0x0FE40FC0 | 1 << 29/* FlushWrOnStpGnt */);
-	}
-}