From ffcac3eb502bbe0acbb30d6fe804f00e07461a7a Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 19 Nov 2019 15:46:49 +0100 Subject: nb/amd/fam10: Drop support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: If36ef0749dbb661f731fb04829bd7e2202ebb422 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36962 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes Reviewed-by: Kyösti Mälkki Reviewed-by: Angel Pons --- src/northbridge/amd/amdmct/mct_ddr3/mctprob.c | 45 --------------------------- 1 file changed, 45 deletions(-) delete mode 100644 src/northbridge/amd/amdmct/mct_ddr3/mctprob.c (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mctprob.c') diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c b/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c deleted file mode 100644 index 3cb75675df..0000000000 --- a/src/northbridge/amd/amdmct/mct_ddr3/mctprob.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2010 Advanced Micro Devices, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include "mct_d.h" -#include "mct_d_gcc.h" - -void mct_BeforeDQSTrainSamp(struct DCTStatStruc *pDCTstat) -{ - u32 val; - - if (pDCTstat->LogicalCPUID & AMD_DR_Bx) { - Set_NB32(pDCTstat->dev_dct, 0x98, 0x0D004007); - val = Get_NB32(pDCTstat->dev_dct, 0x9C); - val |= 0x3FF; - Set_NB32(pDCTstat->dev_dct, 0x9C, val); - Set_NB32(pDCTstat->dev_dct, 0x98, 0x4D0F4F07); - - Set_NB32(pDCTstat->dev_dct, 0x198, 0x0D004007); - val = Get_NB32(pDCTstat->dev_dct, 0x19C); - val |= 0x3FF; - Set_NB32(pDCTstat->dev_dct, 0x19C, val); - Set_NB32(pDCTstat->dev_dct, 0x198, 0x4D0F4F07); - } -} - -void mct_ExtMCTConfig_Bx(struct DCTStatStruc *pDCTstat) -{ - if (pDCTstat->LogicalCPUID & (AMD_DR_Bx)) { - Set_NB32(pDCTstat->dev_dct, 0x11C, 0x0FE40FC0 | 1 << 29/* FlushWrOnStpGnt */); - } -} -- cgit v1.2.3