diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-10-16 13:51:51 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-02 23:45:19 +0100 |
| commit | 730a043fb6cb4dd3cb5af8f8640365727b598648 (patch) | |
| tree | 59afe45caca1a8e1682939c7e44e95344104533e /src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c | |
| parent | d150006c4a4584bc9933c2d8ff580a54c4f0cc2a (diff) | |
cpu/amd: Add initial AMD Family 15h support
TEST: Booted ASUS KGPE-D16 with single Opteron 6380
* Unbuffered DDR3 DIMMs tested and working
* Suspend to RAM (S3) tested and working
Change-Id: Idffd2ce36ce183fbfa087e5ba69a9148f084b45e
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11966
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c b/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c index f55ef901c0..10e9e44a6b 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mcthdi.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2010 Advanced Micro Devices, Inc. + * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,8 +22,8 @@ void mct_DramInit_Hw_D(struct MCTStatStruc *pMCTstat, u32 dev = pDCTstat->dev_dct; /*flag for selecting HW/SW DRAM Init HW DRAM Init */ - reg = 0x90 + 0x100 * dct; /*DRAM Configuration Low */ - val = Get_NB32(dev, reg); + reg = 0x90; /*DRAM Configuration Low */ + val = Get_NB32_DCT(dev, dct, reg); val |= (1<<InitDram); - Set_NB32(dev, reg, val); + Set_NB32_DCT(dev, dct, reg, val); } |