diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-24 15:55:53 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-08 11:35:26 +0000 |
commit | a9473ecbb142d07e95b120dbab6e9e50017f1e55 (patch) | |
tree | eff72fa0a3176aee0b2568b627553788922c7042 /src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | |
parent | f33e835a064d11179c37d2c306ba024aa3a636fd (diff) |
src: Replace common MSR addresses with macros
Change-Id: I9fba67be12483ea5e12ccd34c648735d409bc8b0
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d.c')
-rw-r--r-- | src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 18f96c62a6..cd1f165645 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -2364,10 +2364,10 @@ void precise_ndelay_fam15(struct MCTStatStruc *pMCTstat, uint32_t nanoseconds) { uint64_t start_timestamp; uint64_t current_timestamp; - tsc_msr = rdmsr(0x00000010); + tsc_msr = rdmsr(TSC_MSR); start_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo; do { - tsc_msr = rdmsr(0x00000010); + tsc_msr = rdmsr(TSC_MSR); current_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo; } while ((current_timestamp - start_timestamp) < cycle_count); } |