From a9473ecbb142d07e95b120dbab6e9e50017f1e55 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 24 Oct 2018 15:55:53 +0200 Subject: src: Replace common MSR addresses with macros Change-Id: I9fba67be12483ea5e12ccd34c648735d409bc8b0 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/29252 Tested-by: build bot (Jenkins) Reviewed-by: Richard Spiegel --- src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/northbridge/amd/amdmct/mct_ddr3/mct_d.c') diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c index 18f96c62a6..cd1f165645 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c @@ -2364,10 +2364,10 @@ void precise_ndelay_fam15(struct MCTStatStruc *pMCTstat, uint32_t nanoseconds) { uint64_t start_timestamp; uint64_t current_timestamp; - tsc_msr = rdmsr(0x00000010); + tsc_msr = rdmsr(TSC_MSR); start_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo; do { - tsc_msr = rdmsr(0x00000010); + tsc_msr = rdmsr(TSC_MSR); current_timestamp = (((uint64_t)tsc_msr.hi) << 32) | tsc_msr.lo; } while ((current_timestamp - start_timestamp) < cycle_count); } -- cgit v1.2.3