diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-23 21:36:02 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:28:51 +0200 |
| commit | 5a7e72f1aef02b326a67d883d92fe8c0aad9f3a9 (patch) | |
| tree | 8d51ad99d2d9469f195694b29a571facf18d89f8 /src/northbridge/amd/amdmct/mct/mctcsi_d.c | |
| parent | 2b010b8795de84b6753c5e49d6a73c25fee96da1 (diff) | |
northbridge/amd: Add required space before opening parenthesis '('
Change-Id: Ic85f725bbdf72fbac5a4d9482c61343c5eb35e25
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16305
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdmct/mct/mctcsi_d.c')
| -rw-r--r-- | src/northbridge/amd/amdmct/mct/mctcsi_d.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdmct/mct/mctcsi_d.c b/src/northbridge/amd/amdmct/mct/mctcsi_d.c index 45b926b858..e8d26da45f 100644 --- a/src/northbridge/amd/amdmct/mct/mctcsi_d.c +++ b/src/northbridge/amd/amdmct/mct/mctcsi_d.c @@ -64,7 +64,7 @@ void InterleaveBanks_D(struct MCTStatStruc *pMCTstat, val = Get_NB32(dev, reg); val >>= (ChipSel>>1)<<2; val &= 0x0f; - if(EnChipSels == 1) + if (EnChipSels == 1) BankEncd = val; else /*If number of Rows/Columns not equal, skip */ @@ -79,13 +79,13 @@ void InterleaveBanks_D(struct MCTStatStruc *pMCTstat, } if (DoIntlv) { - if(!_CsIntCap) { + if (!_CsIntCap) { pDCTstat->ErrStatus |= 1<<SB_BkIntDis; DoIntlv = 0; } } - if(DoIntlv) { + if (DoIntlv) { val = Tab_int_D[BankEncd]; if (pDCTstat->Status & (1<<SB_128bitmode)) val++; @@ -113,7 +113,7 @@ void InterleaveBanks_D(struct MCTStatStruc *pMCTstat, val |= val_hi; Set_NB32(dev, reg, val); - if(ChipSel & 1) + if (ChipSel & 1) continue; reg = 0x60 + ((ChipSel>>1)<<2) + reg_off; /*Dram CS Mask 0 */ |