diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-07-28 21:05:26 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-07-31 18:28:48 +0200 |
| commit | 15279a9696c70b82c2223264a505da9122f9aa7b (patch) | |
| tree | 7038d85ab02e392f86a618c49f3db31e14d250f0 /src/northbridge/amd/amdk8/coherent_ht.c | |
| parent | 585d1a0e7d0025e459a35b470572bcdbfff4e3c8 (diff) | |
src/northbridge: Capitalize CPU, RAM and ROM
Change-Id: I5aa27f06f82a8309afb6e06c9e462e5792aa9986
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15940
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdk8/coherent_ht.c')
| -rw-r--r-- | src/northbridge/amd/amdk8/coherent_ht.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdk8/coherent_ht.c b/src/northbridge/amd/amdk8/coherent_ht.c index 8779ec7c7b..a7c3fc27c6 100644 --- a/src/northbridge/amd/amdk8/coherent_ht.c +++ b/src/northbridge/amd/amdk8/coherent_ht.c @@ -113,7 +113,7 @@ static inline void print_linkn (const char *strval, uint8_t byteval) static void disable_probes(void) { /* disable read/write/fill probes for uniprocessor setup - * they don't make sense if only one cpu is available + * they don't make sense if only one CPU is available */ /* Hypetransport Transaction Control Register @@ -1597,7 +1597,7 @@ static void coherent_ht_finalize(unsigned nodes) } #endif - /* set up cpu count and node count and enable Limit + /* set up CPU count and node count and enable Limit * Config Space Range for all available CPUs. * Also clear non coherent hypertransport bus range * registers on Hammer A0 revision. @@ -1622,7 +1622,7 @@ static void coherent_ht_finalize(unsigned nodes) #endif pci_write_config32(dev, 0x60, val); - /* Only respond to real cpu pci configuration cycles + /* Only respond to real CPU pci configuration cycles * and optimize the HT settings */ val=pci_read_config32(dev, HT_TRANSACTION_CONTROL); |