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authorElyes HAOUAS <ehaouas@noos.fr>2014-07-27 19:37:31 +0200
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2014-07-29 04:40:27 +0200
commit0f92f630556b4bf2e4c0696cae4c2f8e97eda334 (patch)
treeb97ad7a89a101c4770774035db5e4693043be928 /src/northbridge/amd/amdht/h3ncmn.c
parent081651b6677c64a5f2861d831822b5f8f3517c21 (diff)
Uniformly spell frequency unit symbol as Hz
Change-Id: I1eb8d5bd79322ff3654a6ad66278a57d46a818c1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6384 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge/amd/amdht/h3ncmn.c')
-rw-r--r--src/northbridge/amd/amdht/h3ncmn.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c
index 830ed1cc22..e83f872bc0 100644
--- a/src/northbridge/amd/amdht/h3ncmn.c
+++ b/src/northbridge/amd/amdht/h3ncmn.c
@@ -1384,7 +1384,7 @@ static void setLinkData(sMainData *pDat, cNorthBridge *nb)
ASSERT((temp >= HT_FREQUENCY_600M && temp <= HT_FREQUENCY_2600M)
|| (temp == HT_FREQUENCY_200M) || (temp == HT_FREQUENCY_400M));
AmdPCIWriteBits(linkBase + HTHOST_FREQ_REV_REG, 11, 8, &temp);
- if (temp > HT_FREQUENCY_1000M) /* Gen1 = 200Mhz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz */
+ if (temp > HT_FREQUENCY_1000M) /* Gen1 = 200MHz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz */
{
/* Enable for Gen3 frequencies */
temp = 1;
@@ -1420,7 +1420,7 @@ static void setLinkData(sMainData *pDat, cNorthBridge *nb)
/* Handle additional HT3 frequency requirements, if needed,
* or clear them if switching down to ht1 on a warm reset.
- * Gen1 = 200Mhz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz
+ * Gen1 = 200MHz -> 1000MHz, Gen3 = 1200MHz -> 2600MHz
*
* Even though we assert if debugging, we need to check that the capability was found
* always, since this is an unknown hardware device, also we are taking