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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-07-30 14:07:15 -0500
committerMartin Roth <martinroth@google.com>2015-11-18 17:14:48 +0100
commit0122afb6093849102caa9662ac14380a41cfb094 (patch)
treed56b9de53c5354f22f48bc7ed1990f1280ae1405 /src/northbridge/amd/amdht/h3finit.c
parent631c8a269006bb8f02860606d35f8d6590954f5e (diff)
cpu/amd/fam10h-fam15h: Update Fam15h APIC config and startup sequence
This fixes Family 15h multiple package support; the previous code hung in CAR setup and romstage when more than one CPU package was installed for a variety of loosely related reasons. TEST: Booted ASUS KGPE-D16 with two Opteron 6328 processors and several different RDIMM configurations. Change-Id: I171197c90f72d3496a385465937b7666cbf7e308 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12020 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/amd/amdht/h3finit.c')
-rw-r--r--src/northbridge/amd/amdht/h3finit.c57
1 files changed, 53 insertions, 4 deletions
diff --git a/src/northbridge/amd/amdht/h3finit.c b/src/northbridge/amd/amdht/h3finit.c
index c9a310b9b8..bcdcfa2ae6 100644
--- a/src/northbridge/amd/amdht/h3finit.c
+++ b/src/northbridge/amd/amdht/h3finit.c
@@ -385,13 +385,49 @@ static u8 convertNodeToLink(u8 srcNode, u8 targetNode, sMainData *pDat)
*/
static void htDiscoveryFloodFill(sMainData *pDat)
{
- u8 currentNode = 0;
- u8 currentLink;
+ uint8_t currentNode = 0;
+ uint8_t currentLink;
+ uint8_t currentLinkID;
+
+ /* NOTE
+ * Each node inside a dual node (socket G34) processor must share
+ * an adjacent node ID. Alter the link scan order such that the
+ * other internal node is always scanned first...
+ */
+ uint8_t currentLinkScanOrder_Default[8] = {0, 1, 2, 3, 4, 5, 6, 7};
+ uint8_t currentLinkScanOrder_G34_Fam10[8] = {1, 0, 2, 3, 4, 5, 6, 7};
+ uint8_t currentLinkScanOrder_G34_Fam15[8] = {2, 0, 1, 3, 4, 5, 6, 7};
+
+ uint8_t fam15h = 0;
+ uint8_t rev_gte_d = 0;
+ uint8_t dual_node = 0;
+ uint32_t f3xe8;
+ uint32_t family;
+ uint32_t model;
+
+ f3xe8 = pci_read_config32(NODE_PCI(0, 3), 0xe8);
+
+ family = model = cpuid_eax(0x80000001);
+ model = ((model & 0xf0000) >> 12) | ((model & 0xf0) >> 4);
+ family = ((family & 0xf00000) >> 16) | ((family & 0xf00) >> 8);
+
+ if (family >= 0x6f) {
+ /* Family 15h or later */
+ fam15h = 1;
+ }
+
+ if ((model >= 0x8) || fam15h)
+ /* Revision D or later */
+ rev_gte_d = 1;
+
+ if (rev_gte_d)
+ /* Check for dual node capability */
+ if (f3xe8 & 0x20000000)
+ dual_node = 1;
/* Entries are always added in pairs, the even indices are the 'source'
* side closest to the BSP, the odd indices are the 'destination' side
*/
-
while (currentNode <= pDat->NodesDiscovered)
{
u32 temp;
@@ -419,11 +455,24 @@ static void htDiscoveryFloodFill(sMainData *pDat)
/* Enable routing tables on currentNode*/
pDat->nb->enableRoutingTables(currentNode, pDat->nb);
- for (currentLink = 0; currentLink < pDat->nb->maxLinks; currentLink++)
+ for (currentLinkID = 0; currentLinkID < pDat->nb->maxLinks; currentLinkID++)
{
BOOL linkfound;
u8 token;
+ if (currentLinkID < 8) {
+ if (dual_node) {
+ if (fam15h)
+ currentLink = currentLinkScanOrder_G34_Fam15[currentLinkID];
+ else
+ currentLink = currentLinkScanOrder_G34_Fam10[currentLinkID];
+ } else {
+ currentLink = currentLinkScanOrder_Default[currentLinkID];
+ }
+ } else {
+ currentLink = currentLinkID;
+ }
+
if (pDat->HtBlock->AMD_CB_IgnoreLink && pDat->HtBlock->AMD_CB_IgnoreLink(currentNode, currentLink))
continue;