diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-08-11 17:47:48 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-24 19:28:00 +0100 |
| commit | 50001b80f54c3d1cdd926102c68d33e549541205 (patch) | |
| tree | 6c789e9040e25f31ed5336a95f59da69ca0ec484 /src/northbridge/amd/amdht/h3ffeat.h | |
| parent | 68130f506df5c77107ece8d71aa45b598be77b45 (diff) | |
northbridge/amd/amdht: Add isochronous setup support
The coherent fabric on all Family 10h/15h devices supports
isochronous mode, which is required for IOMMU operation.
Add initial support for isochronous operation.
Change-Id: Idd7c9b94a65f856b0059e1d45f8719d9475771b6
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12042
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdht/h3ffeat.h')
| -rw-r--r-- | src/northbridge/amd/amdht/h3ffeat.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdht/h3ffeat.h b/src/northbridge/amd/amdht/h3ffeat.h index 628b86e660..bcd4c10cd2 100644 --- a/src/northbridge/amd/amdht/h3ffeat.h +++ b/src/northbridge/amd/amdht/h3ffeat.h @@ -75,6 +75,7 @@ #define HTSLAVE_LINK01_OFFSET 4 #define HTSLAVE_LINK_CONTROL_0_REG 4 #define HTSLAVE_FREQ_REV_0_REG 0xC +#define HTSLAVE_FEATURE_CAP_REG 0x10 /* HT3 gen Capability */ #define IS_HT_GEN3_CAPABILITY(reg) \ @@ -122,10 +123,12 @@ typedef struct u8 SelWidthIn; u8 SelWidthOut; u8 SelFrequency; + uint8_t enable_isochronous_mode; /* This section is for keeping track of capabilities and possible configurations */ BOOL RegangCap; uint32_t PrvFrequencyCap; + uint32_t PrvFeatureCap; u8 PrvWidthInCap; u8 PrvWidthOutCap; uint32_t CompositeFrequencyCap; |