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authorMarc Jones <marc.jones@amd.com>2007-12-19 01:32:08 +0000
committerMarc Jones <marc.jones@amd.com>2007-12-19 01:32:08 +0000
commit8ae8c8822068ef1722c08073ffa4ecc25633cbee (patch)
tree8c7bbf2f7b791081e486439a9b7ffb2fd6e649ac /src/northbridge/amd/amdht/comlib.h
parent2006b38fed2f5f3680de1736f7fc878823f2f93b (diff)
Initial AMD Barcelona support for rev Bx.
These are the core files for HyperTransport, DDR2 Memory, and multi-core initialization. Signed-off-by: Marc Jones <marc.jones@amd.com> Reviewed-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Myles Watson <myles@pel.cs.byu.edu> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdht/comlib.h')
-rw-r--r--src/northbridge/amd/amdht/comlib.h59
1 files changed, 59 insertions, 0 deletions
diff --git a/src/northbridge/amd/amdht/comlib.h b/src/northbridge/amd/amdht/comlib.h
new file mode 100644
index 0000000000..08c6d111f1
--- /dev/null
+++ b/src/northbridge/amd/amdht/comlib.h
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the LinuxBIOS project.
+ *
+ * Copyright (C) 2007 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef COMLIB_H
+#define COMLIB_H
+
+#ifndef FILECODE
+#error "FILECODE was not defined, should be #define'd to 0xFxxx"
+#endif
+
+#include "porting.h"
+
+/* include LinuxBIOS pci functions */
+#include <device/pci_def.h>
+#include <device/pci_ids.h>
+
+#ifdef AMD_DEBUG
+ #define ASSERT(x) ((x) ? 0 : ErrorStop(((uint32)FILECODE)*0x10000 + ((__LINE__)%10) + (((__LINE__/10)%10)*0x10) + (((__LINE__/100)%10)*0x100) +(((__LINE__/1000)%10)*0x1000)))
+#else
+ #define ASSERT(x)
+#endif
+
+#ifdef AMD_DEBUG_ERROR_STOP
+ /* Macro to aid debugging, causes program to halt and display the line number of the halt in decimal */
+ #define STOP_HERE ErrorStop(((uint32)FILECODE)*0x10000 + ((__LINE__)%10) + (((__LINE__/10)%10)*0x10) + (((__LINE__/100)%10)*0x100) +(((__LINE__/1000)%10)*0x1000))
+#else
+ /* Macro to aid debugging, causes program to halt and display the line number of the halt in decimal */
+ /* #define STOP_HERE STOP_HERE_OnlyForDebugUse */
+ #define STOP_HERE
+#endif
+
+void CALLCONV AmdPCIReadBits(SBDFO loc, uint8 highbit, uint8 lowbit, uint32 *value);
+void CALLCONV AmdPCIWriteBits(SBDFO loc, uint8 highbit, uint8 lowbit, uint32 *value);
+void CALLCONV AmdPCIFindNextCap(SBDFO *current);
+
+void CALLCONV Amdmemcpy(void *dst, const void *src, uint32 length);
+void CALLCONV Amdmemset(void *buf, uint8 val, uint32 length);
+
+uint8 CALLCONV AmdBitScanReverse(uint32 value);
+uint32 CALLCONV AmdRotateRight(uint32 value, uint8 size, uint32 count);
+uint32 CALLCONV AmdRotateLeft(uint32 value, uint8 size, uint32 count);
+
+#endif