diff options
| author | Arne Georg Gleditsch <arne.gleditsch@numascale.com> | 2010-09-09 14:54:07 +0000 |
|---|---|---|
| committer | Myles Watson <mylesgw@gmail.com> | 2010-09-09 14:54:07 +0000 |
| commit | d6689ed7813b37c92bbe6058155d67c4757fef26 (patch) | |
| tree | 2067aa432c89740cb808662de827a6d32970d1c3 /src/northbridge/amd/amdfam10 | |
| parent | e0a000cc12984700c87fea6b153fa4221a125e19 (diff) | |
Please find appended. This patch gets rid of the %gs magic altogether,
fixes a few alignment wrinkles and sets up and registers the MMCONF area
for AMD Fam10h CPUs (where selected by mainboard configuration). It
removes a bit of code that proved troublesome in MMCONF setups from
mcp55_early_setup_car.c, as per earlier discussion.
Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/amd/amdfam10')
| -rw-r--r-- | src/northbridge/amd/amdfam10/Kconfig | 11 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/early_ht.c | 6 | ||||
| -rw-r--r-- | src/northbridge/amd/amdfam10/northbridge.c | 24 |
3 files changed, 36 insertions, 5 deletions
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig index 102753e172..5ba0fa9515 100644 --- a/src/northbridge/amd/amdfam10/Kconfig +++ b/src/northbridge/amd/amdfam10/Kconfig @@ -23,6 +23,7 @@ config NORTHBRIDGE_AMD_AMDFAM10 select HAVE_DEBUG_SMBUS select HYPERTRANSPORT_PLUGIN_SUPPORT select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX + select MMCONF_SUPPORT config AGP_APERTURE_SIZE hex @@ -54,6 +55,16 @@ config HW_MEM_HOLE_SIZE_AUTO_INC default n depends on NORTHBRIDGE_AMD_AMDFAM10 +config MMCONF_BASE_ADDRESS + hex + default 0xe0000000 + depends on NORTHBRIDGE_AMD_AMDFAM10 + +config MMCONF_BUS_NUMBER + int + default 256 + depends on NORTHBRIDGE_AMD_AMDFAM10 + config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/amd/amdfam10/bootblock.c" diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index b1c21f2dd3..58f2cddb36 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -129,7 +129,7 @@ static void enumerate_ht_chain(void) PCI_HT_CAP_SLAVE_CTRL0 : PCI_HT_CAP_SLAVE_CTRL1; do { - ctrl = pci_read_config16(devx, pos + ctrl_off); + ctrl = pci_io_read_config16(devx, pos + ctrl_off); /* Is this the end of the hypertransport chain? */ if (ctrl & (1 << 6)) { goto out; @@ -144,8 +144,8 @@ static void enumerate_ht_chain(void) * if its transient */ ctrl |= ((1 << 4) | (1 <<8)); // Link fail + Crc - pci_write_config16(devx, pos + ctrl_off, ctrl); - ctrl = pci_read_config16(devx, pos + ctrl_off); + pci_io_write_config16(devx, pos + ctrl_off, ctrl); + ctrl = pci_io_read_config16(devx, pos + ctrl_off); if (ctrl & ((1 << 4) | (1 << 8))) { // can not clear the error break; diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index d8d1aa234f..a42362682e 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -1440,9 +1440,29 @@ static void cpu_bus_noop(device_t dev) { } +static void cpu_bus_read_resources(device_t dev) +{ +#if CONFIG_MMCONF_SUPPORT + struct resource *resource = new_resource(dev, 0xc0010058); + resource->base = CONFIG_MMCONF_BASE_ADDRESS; + resource->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; + resource->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | + IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; +#endif +} + +static void cpu_bus_set_resources(device_t dev) +{ + struct resource *resource = find_resource(dev, 0xc0010058); + if (resource) { + report_resource_stored(dev, resource, " <mmconfig>"); + } + pci_dev_set_resources(dev); +} + static struct device_operations cpu_bus_ops = { - .read_resources = cpu_bus_noop, - .set_resources = cpu_bus_noop, + .read_resources = cpu_bus_read_resources, + .set_resources = cpu_bus_set_resources, .enable_resources = cpu_bus_noop, .init = cpu_bus_init, .scan_bus = cpu_bus_scan, |