diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-07-28 21:05:26 +0200 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2016-07-31 18:28:48 +0200 |
commit | 15279a9696c70b82c2223264a505da9122f9aa7b (patch) | |
tree | 7038d85ab02e392f86a618c49f3db31e14d250f0 /src/northbridge/amd/amdfam10 | |
parent | 585d1a0e7d0025e459a35b470572bcdbfff4e3c8 (diff) |
src/northbridge: Capitalize CPU, RAM and ROM
Change-Id: I5aa27f06f82a8309afb6e06c9e462e5792aa9986
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15940
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10')
-rw-r--r-- | src/northbridge/amd/amdfam10/early_ht.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index 1199a50430..3e59a324e7 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -41,7 +41,7 @@ static void enumerate_ht_chain(void) if so, don't need to go through the chain */ /* Assumption the HT chain that is bus 0 has the HT I/O Hub on it. - * On most boards this just happens. If a cpu has multiple + * On most boards this just happens. If a CPU has multiple * non Coherent links the appropriate bus registers for the * links needs to be programed to point at bus 0. */ |