From 15279a9696c70b82c2223264a505da9122f9aa7b Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Thu, 28 Jul 2016 21:05:26 +0200 Subject: src/northbridge: Capitalize CPU, RAM and ROM Change-Id: I5aa27f06f82a8309afb6e06c9e462e5792aa9986 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/15940 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/northbridge/amd/amdfam10/early_ht.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/northbridge/amd/amdfam10') diff --git a/src/northbridge/amd/amdfam10/early_ht.c b/src/northbridge/amd/amdfam10/early_ht.c index 1199a50430..3e59a324e7 100644 --- a/src/northbridge/amd/amdfam10/early_ht.c +++ b/src/northbridge/amd/amdfam10/early_ht.c @@ -41,7 +41,7 @@ static void enumerate_ht_chain(void) if so, don't need to go through the chain */ /* Assumption the HT chain that is bus 0 has the HT I/O Hub on it. - * On most boards this just happens. If a cpu has multiple + * On most boards this just happens. If a CPU has multiple * non Coherent links the appropriate bus registers for the * links needs to be programed to point at bus 0. */ -- cgit v1.2.3