romcc:

- Set __PRE_RAM__ define per default
- Properly handle ignored (#ifdef'd out) #include lines

amd/serengeti_cheetah_fam10:
- write ACPI files to $(obj) instead of the top dir (alias $(CURDIR))

tinybootblock:
- provide a way to define code that should be added to the bootblock,
  to map the entire ROM for use by CBFS

amd/model_fxx, amd/model_10xxx:
- add CONFIG_SSE

walkcbfs.S:
- eliminate the use of two registers, to make space for romcc to wiggle

amd/serengeti_cheetah_fam10:
- use the enable_rom framework. not entirely functional yet

Boot-tested on emulation/qemu-x86
Build-tested on amd/serengeti_cheetah_fam10
amd/serengeti_cheetah_fam10 fails in amdht/ somewhere, but builds

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4994 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 12 insertions, 0 deletions

diff --git a/src/northbridge/amd/amdfam10/bootblock.c b/src/northbridge/amd/amdfam10/bootblock.c
new file mode 100644
index 0000000000..612004a7eb
--- /dev/null
+++ b/src/northbridge/amd/amdfam10/bootblock.c
@@ -0,0 +1,12 @@
+#include <arch/io.h>
+#include <arch/romcc_io.h>
+#include <device/pci_def.h>
+#include "northbridge/amd/amdfam10/early_ht.c"
+
+static void bootblock_northbridge_init(void) {
+	/* Nothing special needs to be done to find bus 0 */
+	/* Allow the HT devices to be found */
+	/* mov bsp to bus 0xff when > 8 nodes */
+	set_bsp_node_CHtExtNodeCfgEn();
+	enumerate_ht_chain();
+}