diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-10-16 13:51:51 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2015-11-02 23:45:19 +0100 |
| commit | 730a043fb6cb4dd3cb5af8f8640365727b598648 (patch) | |
| tree | 59afe45caca1a8e1682939c7e44e95344104533e /src/northbridge/amd/amdfam10/amdfam10_util.c | |
| parent | d150006c4a4584bc9933c2d8ff580a54c4f0cc2a (diff) | |
cpu/amd: Add initial AMD Family 15h support
TEST: Booted ASUS KGPE-D16 with single Opteron 6380
* Unbuffered DDR3 DIMMs tested and working
* Suspend to RAM (S3) tested and working
Change-Id: Idffd2ce36ce183fbfa087e5ba69a9148f084b45e
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11966
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/amd/amdfam10/amdfam10_util.c')
| -rw-r--r-- | src/northbridge/amd/amdfam10/amdfam10_util.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/northbridge/amd/amdfam10/amdfam10_util.c b/src/northbridge/amd/amdfam10/amdfam10_util.c index 12452a599a..0ef6c92b49 100644 --- a/src/northbridge/amd/amdfam10/amdfam10_util.c +++ b/src/northbridge/amd/amdfam10/amdfam10_util.c @@ -30,14 +30,14 @@ u32 Get_NB32(u32 dev, u32 reg) } #endif -u32 mctGetLogicalCPUID(u32 Node) +uint64_t mctGetLogicalCPUID(u32 Node) { /* Converts the CPUID to a logical ID MASK that is used to check CPU version support versions */ u32 dev; u32 val, valx; u32 family, model, stepping; - u32 ret; + uint64_t ret; if (Node == 0xFF) { /* current node */ val = cpuid_eax(0x80000001); @@ -96,9 +96,16 @@ u32 mctGetLogicalCPUID(u32 Node) case 0x100a0: ret = AMD_PH_E0; break; + case 0x15012: + case 0x1501f: + ret = AMD_OR_B2; + break; + case 0x15020: + ret = AMD_OR_C0; + break; default: /* FIXME: mabe we should die() here. */ - printk(BIOS_ERR, "FIXME! CPU Version unknown or not supported! \n"); + printk(BIOS_ERR, "FIXME! CPU Version unknown or not supported! %08x\n", valx); ret = 0; } |