diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/northbridge/amd/agesa/state_machine.h | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/amd/agesa/state_machine.h')
| -rw-r--r-- | src/northbridge/amd/agesa/state_machine.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/src/northbridge/amd/agesa/state_machine.h b/src/northbridge/amd/agesa/state_machine.h index 43b205a14d..93625fce12 100644 --- a/src/northbridge/amd/agesa/state_machine.h +++ b/src/northbridge/amd/agesa/state_machine.h @@ -20,7 +20,7 @@ #include <AGESA.h> #include <AMD.h> -#define HAS_LEGACY_WRAPPER IS_ENABLED(CONFIG_BINARYPI_LEGACY_WRAPPER) +#define HAS_LEGACY_WRAPPER CONFIG(BINARYPI_LEGACY_WRAPPER) /* eventlog */ const char *agesa_struct_name(int state); @@ -30,7 +30,7 @@ AGESA_STATUS agesawrapper_amdreadeventlog(UINT8 HeapStatus); /* For suspend-to-ram support. */ -#if !IS_ENABLED(CONFIG_CPU_AMD_PI) +#if !CONFIG(CPU_AMD_PI) /* TODO: With binaryPI we need different interface. */ AGESA_STATUS OemInitResume(AMD_S3_PARAMS *dataBlock); AGESA_STATUS OemS3LateRestore(AMD_S3_PARAMS *dataBlock); @@ -89,18 +89,18 @@ void platform_AfterInitResume(struct sysinfo *cb, AMD_RESUME_PARAMS *Resume); void platform_BeforeS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late); void platform_AfterS3LateRestore(struct sysinfo *cb, AMD_S3LATE_PARAMS *S3Late); -#if IS_ENABLED(CONFIG_CPU_AMD_PI_00660F01) +#if CONFIG(CPU_AMD_PI_00660F01) typedef void AMD_S3SAVE_PARAMS; #endif void platform_AfterS3Save(struct sysinfo *cb, AMD_S3SAVE_PARAMS *S3Save); /* FCH callouts, not used with CIMx. */ #define HAS_AGESA_FCH_OEM_CALLOUT \ - IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_HUDSON) || \ - IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE) || \ - IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_AVALON) || \ - IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_BOLTON) || \ - IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_PI_KERN) + CONFIG(SOUTHBRIDGE_AMD_AGESA_HUDSON) || \ + CONFIG(SOUTHBRIDGE_AMD_AGESA_YANGTZE) || \ + CONFIG(SOUTHBRIDGE_AMD_PI_AVALON) || \ + CONFIG(SOUTHBRIDGE_AMD_PI_BOLTON) || \ + CONFIG(SOUTHBRIDGE_AMD_PI_KERN) #if HAS_AGESA_FCH_OEM_CALLOUT /* FIXME: Structures included here were supposed to be private to AGESA. */ |