diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-03-05 16:53:33 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-08 08:33:24 +0000 |
| commit | cd49cce7b70e80b4acc49b56bb2bb94370b4d867 (patch) | |
| tree | 8e89136e2da7cf54453ba8c112eda94415b56242 /src/northbridge/amd/agesa/family16kb | |
| parent | b3a8cc54dbaf833c590a56f912209a5632b71f49 (diff) | |
coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)
This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/amd/agesa/family16kb')
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/northbridge.c | 2 | ||||
| -rw-r--r-- | src/northbridge/amd/agesa/family16kb/state_machine.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index ddfab82e78..44f49ea094 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -366,7 +366,7 @@ static void create_vga_resource(struct device *dev, unsigned nodeid) * we only deal with the 'first' vga card */ for (link = dev->link_list; link; link = link->next) { if (link->bridge_ctrl & PCI_BRIDGE_CTL_VGA) { -#if IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS) +#if CONFIG(MULTIPLE_VGA_ADAPTERS) extern struct device *vga_pri; // the primary vga device, defined in device.c printk(BIOS_DEBUG, "VGA: vga_pri bus num = %d bus range [%d,%d]\n", vga_pri->bus->secondary, link->secondary,link->subordinate); diff --git a/src/northbridge/amd/agesa/family16kb/state_machine.c b/src/northbridge/amd/agesa/family16kb/state_machine.c index 9840c1c73c..fea097f6c6 100644 --- a/src/northbridge/amd/agesa/family16kb/state_machine.c +++ b/src/northbridge/amd/agesa/family16kb/state_machine.c @@ -32,7 +32,7 @@ void platform_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *Post) { AGESA_STATUS status; - if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) { + if (CONFIG(ENABLE_MRC_CACHE)) { status = OemInitResume(&Post->MemConfig.MemContext); if (status == AGESA_SUCCESS) Post->MemConfig.MemRestoreCtl = 1; |