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authorKyösti Mälkki <kyosti.malkki@gmail.com>2014-06-20 12:31:23 +0300
committerPatrick Georgi <patrick@georgi-clan.de>2014-06-21 08:04:57 +0200
commitc551caae56535b056be0440b08bd57e24459242c (patch)
tree3634d118a1aa2871cc7f77d6ed2ffde33b840f94 /src/northbridge/amd/agesa/family14
parent8ae16a44a4a588c8ae81979634ddee681db4f804 (diff)
AMD cimx/sb800: Use acpi_is_wakeup_s3()
Change-Id: If237c2fcd52f50d5fa0cad5a02a941386b085f2e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6077 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/northbridge/amd/agesa/family14')
-rw-r--r--src/northbridge/amd/agesa/family14/northbridge.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index ec07c18506..7b6b401273 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -761,17 +761,12 @@ static void domain_enable_resources(device_t dev)
u32 val;
#if CONFIG_AMD_SB_CIMX
- #if CONFIG_HAVE_ACPI_RESUME
- if (acpi_slp_type != 3) {
+ if (!acpi_is_wakeup_s3()) {
sb_After_Pci_Init();
sb_Mid_Post_Init();
} else {
sb_After_Pci_Restore_Init();
}
- #else
- sb_After_Pci_Init();
- sb_Mid_Post_Init();
- #endif
#endif
/* Must be called after PCI enumeration and resource allocation */