diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-04 15:24:07 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-20 16:36:04 +0000 |
| commit | e934be2215a864a63758a96865313735b8b36aff (patch) | |
| tree | 36a1956c58d02ab088a1c9a3ae81c5fe191e2492 /src/mainboard | |
| parent | 62e3895bba2572a3a51f9dcceb52dcecfda893dd (diff) | |
mb/asrock/h110m: Choose `CHIPSET_LOCKDOWN_COREBOOT`
The `chipset_lockdown` option defaults to `CHIPSET_LOCKDOWN_FSP` if
omitted. As most of the mainboards use `CHIPSET_LOCKDOWN_COREBOOT`,
choose it here as well for consistency.
Change-Id: I5ef61f3d931abdb740411d8c58048cf21185802c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/asrock/h110m/devicetree.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/asrock/h110m/devicetree.cb b/src/mainboard/asrock/h110m/devicetree.cb index 4cb873585f..74e5720b0c 100644 --- a/src/mainboard/asrock/h110m/devicetree.cb +++ b/src/mainboard/asrock/h110m/devicetree.cb @@ -42,6 +42,10 @@ chip soc/intel/skylake # Send an extra VR mailbox command for the PS4 exit issue register "SendVrMbxCmd" = "2" + register "common_soc_config" = "{ + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + }" + device cpu_cluster 0 on device lapic 0 on end end |