diff options
| author | Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com> | 2021-08-30 15:37:58 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-31 15:14:08 +0000 |
| commit | e8982d1be84c0ed8d07d8c7d1db11535349c7682 (patch) | |
| tree | f3b5032e97b60810177885bd8daa0dafdb29beba /src/mainboard | |
| parent | ab11f462191263e56ac539d532a365699d88b8f3 (diff) | |
mb/google/brya/var/gimble: Include SPD for K4UBE3D4AA-MGCR
Add SPD support to gimble for LPDDR4 memory part K4UBE3D4AA-MGCR.
BUG=b:191574298
TEST=USE="project_gimble emerge-brya coreboot" and verify it builds without error.
Signed-off-by: Mark Hsieh <mark_hsieh@wistron.corp-partner.google.com>
Change-Id: Ida21fd50129412af59a341dea45232fd0f9931ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57253
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
3 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc b/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc index 12f2bf259d..c94782bea6 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/gimble/memory/Makefile.inc @@ -3,5 +3,5 @@ SPD_SOURCES = SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M32D2NP-046 WT:E, H9HCNNNBKMMLXR-NEE, K4U6E3S4AA-MGCR -SPD_SOURCES += lp4x-spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE +SPD_SOURCES += lp4x-spd-3.hex # ID = 1(0b0001) Parts = H9HCNNNCPMMLXR-NEE, K4UBE3D4AA-MGCR SPD_SOURCES += lp4x-spd-4.hex # ID = 2(0b0010) Parts = MT53E1G32D2NP-046 WT:A diff --git a/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt index 243fc55b2f..db6331f355 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/gimble/memory/dram_id.generated.txt @@ -4,3 +4,4 @@ H9HCNNNCPMMLXR-NEE 1 (0001) H9HCNNNBKMMLXR-NEE 0 (0000) MT53E1G32D2NP-046 WT:A 2 (0010) K4U6E3S4AA-MGCR 0 (0000) +K4UBE3D4AA-MGCR 1 (0001) diff --git a/src/mainboard/google/brya/variants/gimble/memory/mem_list_variant.txt b/src/mainboard/google/brya/variants/gimble/memory/mem_list_variant.txt index bec9cc804a..7cb0e233af 100644 --- a/src/mainboard/google/brya/variants/gimble/memory/mem_list_variant.txt +++ b/src/mainboard/google/brya/variants/gimble/memory/mem_list_variant.txt @@ -3,3 +3,4 @@ H9HCNNNCPMMLXR-NEE H9HCNNNBKMMLXR-NEE MT53E1G32D2NP-046 WT:A K4U6E3S4AA-MGCR +K4UBE3D4AA-MGCR |