diff options
author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-09-22 20:05:53 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-23 18:33:00 +0000 |
commit | dea4e0fe683faef0becac4930769693422da5a85 (patch) | |
tree | 6652608b4524222e08b1464af63428ea925d0410 /src/mainboard | |
parent | 2876e4f49aec84288d2b8d24885e5b22241fe907 (diff) |
soc/amd/common/blocks/include: rename gpio_banks.h to gpio.h
This brings the AMD SoC GPIO code in line with the Intel SoC code and
removes the not really needed suffix.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ie2dbec81dfe503869beb2872b01a7475e2b88b33
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/guybrush/ec.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h | 2 | ||||
-rw-r--r-- | src/mainboard/google/guybrush/verstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/ec.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h | 2 | ||||
-rw-r--r-- | src/mainboard/google/mancomb/verstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/zork/mainboard.c | 2 | ||||
-rw-r--r-- | src/mainboard/google/zork/verstage.c | 2 | ||||
-rw-r--r-- | src/mainboard/pcengines/apu2/romstage.c | 2 |
9 files changed, 9 insertions, 9 deletions
diff --git a/src/mainboard/google/guybrush/ec.c b/src/mainboard/google/guybrush/ec.c index 67fdda1428..f62ca2027c 100644 --- a/src/mainboard/google/guybrush/ec.c +++ b/src/mainboard/google/guybrush/ec.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <acpi/acpi.h> -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <amdblocks/smi.h> #include <ec/google/chromeec/ec.h> #include <soc/smi.h> diff --git a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h index b9a70885ed..aab905bad9 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h @@ -3,7 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <soc/pci_devs.h> #define WLAN_DEVFN PCIE_GPP_2_0_DEVFN diff --git a/src/mainboard/google/guybrush/verstage.c b/src/mainboard/google/guybrush/verstage.c index e15cc33195..aaaaf038de 100644 --- a/src/mainboard/google/guybrush/verstage.c +++ b/src/mainboard/google/guybrush/verstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <amdblocks/acpimmio.h> -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <arch/io.h> #include <baseboard/variants.h> #include <security/vboot/vboot_common.h> diff --git a/src/mainboard/google/mancomb/ec.c b/src/mainboard/google/mancomb/ec.c index 67fdda1428..f62ca2027c 100644 --- a/src/mainboard/google/mancomb/ec.c +++ b/src/mainboard/google/mancomb/ec.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <acpi/acpi.h> -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <amdblocks/smi.h> #include <ec/google/chromeec/ec.h> #include <soc/smi.h> diff --git a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h index dccaed0e2c..632849d394 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/mancomb/variants/baseboard/include/baseboard/variants.h @@ -3,7 +3,7 @@ #ifndef __BASEBOARD_VARIANTS_H__ #define __BASEBOARD_VARIANTS_H__ -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> /* * This function provides base GPIO configuration table. It is typically provided by diff --git a/src/mainboard/google/mancomb/verstage.c b/src/mainboard/google/mancomb/verstage.c index 0e90231532..d2d9277405 100644 --- a/src/mainboard/google/mancomb/verstage.c +++ b/src/mainboard/google/mancomb/verstage.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <baseboard/variants.h> #include <security/vboot/vboot_common.h> diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index 6b51d52408..ea292f163e 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -7,7 +7,7 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> #include <amdblocks/amd_pci_util.h> -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <amdblocks/smi.h> #include <baseboard/variants.h> #include <boardid.h> diff --git a/src/mainboard/google/zork/verstage.c b/src/mainboard/google/zork/verstage.c index 0c7a04f9a7..e1277f4d14 100644 --- a/src/mainboard/google/zork/verstage.c +++ b/src/mainboard/google/zork/verstage.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <baseboard/variants.h> #include <security/vboot/vboot_common.h> diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index 4c142d011a..2509031f3e 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -2,7 +2,7 @@ #include <stdint.h> #include <amdblocks/acpimmio.h> -#include <amdblocks/gpio_banks.h> +#include <amdblocks/gpio.h> #include <amdblocks/gpio_defs.h> #include <device/pci_def.h> #include <device/pci_ops.h> |