diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-09 21:40:32 +0200 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-12 19:12:22 +0000 |
commit | d838c8f4f429e7023c10a462975631dd617f22be (patch) | |
tree | 680db78c6f0bf80ef23e219796e552202cace2b4 /src/mainboard | |
parent | 3a8edc1f00b5e46e0ddc8059994b50ff4b8759f5 (diff) |
mb/clevo/l140cu: drop disabled SPD indices
Drop the disabled SPD indices from memcfg, since they're already
initialized to 0.
Change-Id: I6d88bdac17222c2c5c35439517fe0bea46744b2b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/romstage.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c b/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c index 1af8ce6633..44014831e0 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c +++ b/src/mainboard/clevo/cml-u/variants/l140cu/romstage.c @@ -4,17 +4,14 @@ #include <soc/romstage.h> static const struct cnl_mb_cfg memcfg = { - /* Parameters required to access SPD for CH0D0/CH0D1/CH1D0/CH1D1. */ .spd[0] = { .read_type = READ_SPD_CBFS, .spd_spec = {.spd_index = 0}, }, - .spd[1] = {.read_type = NOT_EXISTING}, .spd[2] = { .read_type = READ_SMBUS, .spd_spec = {.spd_smbus_address = 0xa4}, }, - .spd[3] = {.read_type = NOT_EXISTING}, /* * For each channel, there are 3 sets of DQ byte mappings, |