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authorShawn Nematbakhsh <shawnn@chromium.org>2013-06-26 18:11:23 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-12-12 22:02:42 +0100
commitd6ff9e7deb0680b7d54958377834bc3c7606ba0c (patch)
tree9e879ac5d9545b515964ced507203b22e22aff49 /src/mainboard
parentccb12fbb58c13af46e2275fd50cd8b171fdd169a (diff)
peppy: RAM_ID + storage changes for next build.
- Update RAM_ID table. - Add DEVSLP0 signal to NGFF SATA port. Note: After this change, old Micron 2GB boards will no longer boot. Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Change-Id: Id68a1d6ace2702cca9c37305726cd55a0bde5005 Reviewed-on: https://gerrit.chromium.org/gerrit/60167 Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-by: Dave Parker <dparker@chromium.org> Commit-Queue: Dave Parker <dparker@chromium.org> Reviewed-on: http://review.coreboot.org/4340 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/peppy/gpio.h2
-rw-r--r--src/mainboard/google/peppy/romstage.c7
2 files changed, 4 insertions, 5 deletions
diff --git a/src/mainboard/google/peppy/gpio.h b/src/mainboard/google/peppy/gpio.h
index dab086a0f8..32b1928072 100644
--- a/src/mainboard/google/peppy/gpio.h
+++ b/src/mainboard/google/peppy/gpio.h
@@ -56,7 +56,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = {
LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */
LP_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */
LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */
- LP_GPIO_UNUSED, /* 33: UNUSED */
+ LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */
LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */
LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */
LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */
diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c
index bb65f005fe..bfa168174c 100644
--- a/src/mainboard/google/peppy/romstage.c
+++ b/src/mainboard/google/peppy/romstage.c
@@ -92,10 +92,9 @@ static void copy_spd(struct pei_data *peid)
if (spd_file->len < sizeof(peid->spd_data[0]))
die("Missing SPD data.");
- /* Index 0 is 2GB config with CH0 only. This is suject to change.
- * TODO(shawnn): Check the decoding before next build.
- */
- if (spd_index == 0)
+ /* Index 0-2 are 4GB config with both CH0 and CH1
+ * Index 4-6 are 2GB config with CH0 only */
+ if (spd_index > 3)
peid->dimm_channel1_disabled = 3;
memcpy(peid->spd_data[0],