diff options
author | Zhuohao Lee <zhuohao@chromium.org> | 2022-01-21 00:28:58 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-02 13:10:47 +0000 |
commit | d036a70d74e1c338315ebd3076e8f8b27d5d103a (patch) | |
tree | b23e84ac545974b7a5baa1a1b639575c6d886874 /src/mainboard | |
parent | 84eb532ec39216c7fcd38ed820ef9b4e22db3085 (diff) |
mb/google/brya: enable the SPD_CACHE_ENABLE
google/brask is using SODIMMs for DRAM. Reading spd data is
surprisingly slow (~170 ms), therefore enable the SPD cache.
BUG=b:200243989
BRANCH=firmware-brya-14505.B
TEST=run on the device and measure the boot time decrease.
Change-Id: If0a0072160a48b607ad17c0a1819ab49eaad92db
Signed-off-by: Zhuohao Lee <zhuohao@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/brya/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index f7bd715f5d..00e8bc9c18 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -239,6 +239,7 @@ endchoice config MEMORY_SODIMM def_bool n + select SPD_CACHE_ENABLE select SPD_CACHE_IN_FMAP config MEMORY_SOLDERDOWN |