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authorAseda Aboagye <aaboagye@google.com>2021-04-08 15:42:54 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-04-11 21:07:22 +0000
commitc8b79b9606ceab52502cbbf8f5e3daada6440ebc (patch)
treef2604fe198c3e85df2d16238f62401715dae3685 /src/mainboard
parenta643e212c28614da73b08feb47bdbe772385a437 (diff)
mb/google/dedede: Enable HECI
This commit enables HECI such that interface can be used from userspace on the dedede mainboards. BUG=b:184219504 TEST=Build and flash drawcia, verify that Intel Flash Programming Tool can communicate with the Converged Security Engine. Signed-off-by: Aseda Aboagye <aaboagye@google.com> Change-Id: I5b28c471d6554a5e14538073d48ef47da05936fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/52196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/dedede/variants/baseboard/devicetree.cb3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index bb76c9c9ed..69dd89c0bf 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -189,6 +189,9 @@ chip soc/intel/jasperlake
# - PM_CFG.SLP_LAN_MIN_ASST_WDTH
register "PchPmPwrCycDur" = "1" # 1s
+ # Enable HECI
+ register "HeciEnabled" = "1"
+
device domain 0 on
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device