diff options
| author | John Su <john_su@compal.corp-partner.google.com> | 2023-07-04 17:50:50 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-07-06 00:57:29 +0000 |
| commit | c08b645ffcdac63f68e4f8d6808a2481d0b1d6d0 (patch) | |
| tree | 7f2baaa175c74709a8afdbc1f65b86e57c1c306a /src/mainboard | |
| parent | dbf1b63b112550b3b504aef48bb57276802fff7d (diff) | |
mb/google/brya/var/mithrax: Generate SPD ID for supported parts
Add new memory parts in the mem_parts_used.txt and generate the
SPD ID for the parts. The memory parts being added are:
1. K4U6E3S4AB-MGCL (Samsung)
2. K4UBE3D4AB-MGCL (Samsung)
BUG=b:289873670
BRANCH=brya
TEST=emerge-brya coreboot chromeos-bootimage
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: I7a262ac62c24cfb43c0283c9730c177a242342e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76240
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
3 files changed, 8 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/mithrax/memory/Makefile.inc b/src/mainboard/google/brya/variants/mithrax/memory/Makefile.inc index fe4ba17a8f..58783cb9fd 100644 --- a/src/mainboard/google/brya/variants/mithrax/memory/Makefile.inc +++ b/src/mainboard/google/brya/variants/mithrax/memory/Makefile.inc @@ -1,9 +1,9 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/src/part_id_gen/part_id_gen ADL lp4x src/mainboard/google/brya/variants/mithrax/memory src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/mithrax/memory src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE -SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = K4UBE3D4AA-MGCR, H9HCNNNCPMMLXR-NEE, MT53E1G32D2NP-046 WT:B +SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = K4U6E3S4AA-MGCR, H9HCNNNBKMMLXR-NEE, K4U6E3S4AB-MGCL +SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = K4UBE3D4AA-MGCR, H9HCNNNCPMMLXR-NEE, MT53E1G32D2NP-046 WT:B, K4UBE3D4AB-MGCL SPD_SOURCES += spd/lp4x/set-0/spd-4.hex # ID = 2(0b0010) Parts = MT53E1G32D2NP-046 WT:A diff --git a/src/mainboard/google/brya/variants/mithrax/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/mithrax/memory/dram_id.generated.txt index dc3f041deb..d452cf9f64 100644 --- a/src/mainboard/google/brya/variants/mithrax/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/mithrax/memory/dram_id.generated.txt @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# util/spd_tools/src/part_id_gen/part_id_gen ADL lp4x src/mainboard/google/brya/variants/mithrax/memory src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt +# util/spd_tools/bin/part_id_gen ADL lp4x src/mainboard/google/brya/variants/mithrax/memory src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt DRAM Part Name ID to assign K4U6E3S4AA-MGCR 0 (0000) @@ -10,3 +10,5 @@ H9HCNNNBKMMLXR-NEE 0 (0000) H9HCNNNCPMMLXR-NEE 1 (0001) MT53E1G32D2NP-046 WT:A 2 (0010) MT53E1G32D2NP-046 WT:B 1 (0001) +K4U6E3S4AB-MGCL 0 (0000) +K4UBE3D4AB-MGCL 1 (0001) diff --git a/src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt index 6114291fc8..89b4b9f3ae 100644 --- a/src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/mithrax/memory/mem_parts_used.txt @@ -4,3 +4,5 @@ H9HCNNNBKMMLXR-NEE H9HCNNNCPMMLXR-NEE MT53E1G32D2NP-046 WT:A MT53E1G32D2NP-046 WT:B +K4U6E3S4AB-MGCL +K4UBE3D4AB-MGCL |