diff options
| author | Nick Vaccaro <nvaccaro@google.com> | 2021-10-12 18:41:33 -0700 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2021-12-07 00:18:01 +0000 |
| commit | b049eb2d99560fb6b5685965d433f4b1d5e24898 (patch) | |
| tree | be1aa56e62278668ef6d9d40b963bf9179bb90a4 /src/mainboard | |
| parent | 12f216bf87e465d65614ae23142b5f01e960ea22 (diff) | |
mb/google/brya: add list of gpios to lock
Add a list of gpios to lock for brya. This currently includes
GPIOs connected to the FPMCU.
BUG=b:201430600
TEST='emerge-brya coreboot chromeos-bootimage', flash and verify that
brya0 boots successfully to kernel.
Change-Id: Idea42a58575c280be0770d38f934acdf5508c45d
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58353
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/brya/gpio.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c index a28f873ed9..0583930b6c 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/gpio.c +++ b/src/mainboard/google/brya/variants/baseboard/brya/gpio.c @@ -456,3 +456,21 @@ const struct pad_config *__weak variant_romstage_gpio_table(size_t *num) *num = 0; return NULL; } + +static struct gpio_lock_config lockable_brya_gpios[] = { + { GPP_B6, GPIO_LOCK_CONFIG }, /* PCH_I2C_TPM_SCL */ + { GPP_B7, GPIO_LOCK_CONFIG }, /* PCH_I2C_TPM_SDA */ + { GPP_A13, GPIO_LOCK_CONFIG }, /* GSC_PCH_INT_ODL */ + { GPP_E15, GPIO_LOCK_CONFIG }, /* PCH_WP_OD */ + { GPP_F11, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CLK_FPMCU_R */ + { GPP_F13, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D1_FPMCU_D0 */ + { GPP_F12, GPIO_LOCK_CONFIG }, /* GSPI_PCH_D0_FPMCU_D1_R */ + { GPP_F15, GPIO_LOCK_CONFIG }, /* FPMCU_INT_L */ + { GPP_F16, GPIO_LOCK_CONFIG }, /* GSPI_PCH_CS_FPMCU_R_L */ +}; + +const struct gpio_lock_config *mb_gpio_lock_config(size_t *num) +{ + *num = ARRAY_SIZE(lockable_brya_gpios); + return lockable_brya_gpios; +} |