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authorJakub Czapiga <jacz@semihalf.com>2022-02-15 11:50:31 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-08 16:06:33 +0000
commitad6157ebdfddc39b95e388487e00cadd2bbf368b (patch)
treebbb85c9b13faf74515387ee8978eefd6d79e6b06 /src/mainboard
parente96ade6981c60af4d6f24471d7f6a440ab7bfd4e (diff)
timestamps: Rename timestamps to make names more consistent
This patch aims to make timestamps more consistent in naming, to follow one pattern. Until now there were many naming patterns: - TS_START_*/TS_END_* - TS_BEFORE_*/TS_AFTER_* - TS_*_START/TS_*_END This change also aims to indicate, that these timestamps can be used to create time-ranges, e.g. from TS_BOOTBLOCK_START to TS_BOOTBLOCK_END. Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I533e32392224d9b67c37e6a67987b09bf1cf51c6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/daisy/romstage.c6
-rw-r--r--src/mainboard/google/nyan/romstage.c2
-rw-r--r--src/mainboard/google/nyan_big/romstage.c2
-rw-r--r--src/mainboard/google/nyan_blaze/romstage.c2
-rw-r--r--src/mainboard/google/peach_pit/romstage.c6
-rw-r--r--src/mainboard/google/veyron/romstage.c6
-rw-r--r--src/mainboard/google/veyron_mickey/romstage.c6
-rw-r--r--src/mainboard/google/veyron_rialto/romstage.c6
8 files changed, 18 insertions, 18 deletions
diff --git a/src/mainboard/google/daisy/romstage.c b/src/mainboard/google/daisy/romstage.c
index b8105fdcda..dd3bc72000 100644
--- a/src/mainboard/google/daisy/romstage.c
+++ b/src/mainboard/google/daisy/romstage.c
@@ -123,7 +123,7 @@ void main(void)
int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
timestamp_init(timestamp_get());
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
/* Clock must be initialized before console_init, otherwise you may need
* to re-initialize serial console drivers again. */
@@ -134,11 +134,11 @@ void main(void)
setup_power(is_resume);
- timestamp_add_now(TS_BEFORE_INITRAM);
+ timestamp_add_now(TS_INITRAM_START);
setup_memory(mem, is_resume);
- timestamp_add_now(TS_AFTER_INITRAM);
+ timestamp_add_now(TS_INITRAM_END);
/* This needs to happen on normal boots and on resume. */
trustzone_init();
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index 9579047ee6..4ae7ef0fa9 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -24,7 +24,7 @@
static void __attribute__((noinline)) romstage(void)
{
timestamp_init(0);
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
console_init();
exception_init();
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index 9579047ee6..4ae7ef0fa9 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -24,7 +24,7 @@
static void __attribute__((noinline)) romstage(void)
{
timestamp_init(0);
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
console_init();
exception_init();
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index f1087d04fb..229e23655f 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -25,7 +25,7 @@
static void __attribute__((noinline)) romstage(void)
{
timestamp_init(0);
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
console_init();
exception_init();
diff --git a/src/mainboard/google/peach_pit/romstage.c b/src/mainboard/google/peach_pit/romstage.c
index 83d38fa142..3509a45777 100644
--- a/src/mainboard/google/peach_pit/romstage.c
+++ b/src/mainboard/google/peach_pit/romstage.c
@@ -212,7 +212,7 @@ void main(void)
power_init_failed = setup_power(is_resume);
timestamp_init(timestamp_get());
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
/* Clock must be initialized before console_init, otherwise you may need
* to re-initialize serial console drivers again. */
@@ -228,11 +228,11 @@ void main(void)
/* re-initialize PMIC I2C channel after (re-)setting system clocks */
i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */
- timestamp_add_now(TS_BEFORE_INITRAM);
+ timestamp_add_now(TS_INITRAM_START);
setup_memory(&mem_timings, is_resume);
- timestamp_add_now(TS_AFTER_INITRAM);
+ timestamp_add_now(TS_INITRAM_END);
primitive_mem_test();
diff --git a/src/mainboard/google/veyron/romstage.c b/src/mainboard/google/veyron/romstage.c
index 35ddf85990..de4617c24e 100644
--- a/src/mainboard/google/veyron/romstage.c
+++ b/src/mainboard/google/veyron/romstage.c
@@ -64,7 +64,7 @@ static void sdmmc_power_off(void)
void main(void)
{
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
console_init();
exception_init();
@@ -77,11 +77,11 @@ void main(void)
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
- timestamp_add_now(TS_BEFORE_INITRAM);
+ timestamp_add_now(TS_INITRAM_START);
sdram_init(get_sdram_config());
- timestamp_add_now(TS_AFTER_INITRAM);
+ timestamp_add_now(TS_INITRAM_END);
/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
mmu_config_range((uintptr_t)_dram/MiB,
diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c
index bac2acbefb..fb0230a7d2 100644
--- a/src/mainboard/google/veyron_mickey/romstage.c
+++ b/src/mainboard/google/veyron_mickey/romstage.c
@@ -58,7 +58,7 @@ static void configure_l2ctlr(void)
void main(void)
{
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
console_init();
exception_init();
@@ -68,11 +68,11 @@ void main(void)
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
- timestamp_add_now(TS_BEFORE_INITRAM);
+ timestamp_add_now(TS_INITRAM_START);
sdram_init(get_sdram_config());
- timestamp_add_now(TS_AFTER_INITRAM);
+ timestamp_add_now(TS_INITRAM_END);
/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
mmu_config_range((uintptr_t)_dram/MiB,
diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c
index acea7a095d..db2e343280 100644
--- a/src/mainboard/google/veyron_rialto/romstage.c
+++ b/src/mainboard/google/veyron_rialto/romstage.c
@@ -64,7 +64,7 @@ static void sdmmc_power_off(void)
void main(void)
{
- timestamp_add_now(TS_START_ROMSTAGE);
+ timestamp_add_now(TS_ROMSTAGE_START);
console_init();
exception_init();
@@ -77,11 +77,11 @@ void main(void)
/* vdd_log 1200mv is enough for ddr run 666Mhz */
regulate_vdd_log(1200);
- timestamp_add_now(TS_BEFORE_INITRAM);
+ timestamp_add_now(TS_INITRAM_START);
sdram_init(get_sdram_config());
- timestamp_add_now(TS_AFTER_INITRAM);
+ timestamp_add_now(TS_INITRAM_END);
/* Now that DRAM is up, add mappings for it and DMA coherency buffer. */
mmu_config_range((uintptr_t)_dram/MiB,