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authorJake Mannens <jakem_5@hotmail.com>2020-04-09 09:40:57 +1000
committerAngel Pons <th3fanbus@gmail.com>2020-04-10 22:28:00 +0000
commita0722870a818bec8693911d836ba1bb703d9c676 (patch)
tree35986bc26441476bec0728c4652daab1c00be63c /src/mainboard
parentcf0d1c31647cf0c935f206cde36abc473265f93d (diff)
mb/lenovo/t420s/devicetree.cb: Fix PCIe port definitions
The NEC uPD720200A USB 3.0 controller on the T420s is actually connected to PCIe root port #5 on the PCH, not #7. Enable RP#5, disable RP#7 and update comments accordingly. Test=USB 3.0 controller shows in `lspci` Change-Id: I21ac72fd5632e552bdcdbd573cf92b433ed545ff Signed-off-by: Jake Mannens <jakem_5@hotmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40281 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/lenovo/t420s/devicetree.cb4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
index 2fde40ff9d..1f794c1b24 100644
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ b/src/mainboard/lenovo/t420s/devicetree.cb
@@ -84,9 +84,9 @@ chip northbridge/intel/sandybridge
device pci 1c.3 on
smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
end # PCIe Port #4 ExpressCard
- device pci 1c.4 off end # PCIe Port #5
+ device pci 1c.4 on end # PCIe Port #5 NEC Corporation uPD720200A USB 3.0 Host Controller
device pci 1c.5 off end # PCIe Port #6 Intel Gigabit Ethernet PHY (not PCIe)
- device pci 1c.6 on end # PCIe Port #7 NEC Corporation uPD720200A USB 3.0 Host Controller
+ device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB Enhanced Host Controller #1
device pci 1e.0 off end # PCI bridge