diff options
| author | Simon Yang <simon1.yang@intel.com> | 2024-08-01 18:51:32 +0800 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-09-26 15:41:43 +0000 |
| commit | 9bd0ca2f5ef52cc70a64ec31dbef0f1a7e1ea8d0 (patch) | |
| tree | 63d73ff20c3b487249d7e8524bdbd234b0dee76c /src/mainboard | |
| parent | bafae46bcb652fa5a7f58f750d518f412187442d (diff) | |
mb/google/{nissa,trulo}: Add Vccin Aux Imon Iccmax default value
Add default value in nissa and trulo devicetree.cb, ODM have to review
the board design to follow RDC#646929 Power Map requirement.
NOTE: The VccInAuxImonIccImax remains unchanged w/ and w/o this CL.
BUG=b:330117043
BRANCH=firmware-nissa-15217.B
TEST='emerge-nissa coreboot chromeos-bootimage'
Change-Id: Iaedd34757aa6802edcae402e751bc39b9cfe9e0c
Signed-off-by: Simon Yang <simon1.yang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83725
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb index 5ba10eed9f..30e83092d8 100644 --- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb @@ -94,6 +94,9 @@ chip soc/intel/alderlake # Disable Package C-state demotion for nissa baseboard. register "disable_package_c_state_demotion" = "true" + # Vccin Aux Imon Iccmax, follow RDC#646929 Power Map requirement + register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A + # Intel Common SoC Config #+-------------------+---------------------------+ #| Field | Value | diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb index dc0d4807f9..6016a7f03a 100644 --- a/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb @@ -44,6 +44,9 @@ chip soc/intel/alderlake register "pch_hda_sdi_enable[0]" = "true" register "pch_hda_sdi_enable[1]" = "true" + # Vccin Aux Imon Iccmax, follow RDC#646929 Power Map requirement + register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A + device domain 0 on # The timing values can be derived from datasheet of display panel # You can use EDID string to identify the type of display on the board |