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authorJustin TerAvest <teravest@chromium.org>2018-01-23 22:05:19 -0700
committerAaron Durbin <adurbin@chromium.org>2018-01-25 22:35:56 +0000
commit9a045cf203bd05cef1b5aa8f2f01edf1eca99063 (patch)
treedb2758312862656cd6e89f509755cf973a3e5d9c /src/mainboard
parent9d2ed4da66f3a76d7a224522b601430627f5db24 (diff)
mb/google/kahlee: Add Grunt devicetree i2c bus cfg
I2C bus configuration is generally set up in devicetree.cb. This change establishes listings for the buses so that they can be used (though followup changes should update the buses to have correct timings). BUG=b:72121803 Change-Id: I2b12c82d2bab42ab470aa207880be8876e7cb75f Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://review.coreboot.org/23407 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/kahlee/variants/grunt/devicetree.cb28
1 files changed, 28 insertions, 0 deletions
diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
index d35467fab7..d42d40adaf 100644
--- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
+++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb
@@ -21,6 +21,34 @@ chip soc/amd/stoneyridge
register "uma_mode" = "UMAMODE_SPECIFIED_SIZE"
register "uma_size" = "128 * MiB"
+ # TODO(teravest): Fix speeds here.
+ register "i2c[0]" = "{
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ }"
+
+ # TODO(teravest): Fix speeds here.
+ register "i2c[1]" = "{
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ }"
+
+ # TODO(teravest): Fix speeds here.
+ register "i2c[2]" = "{
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ }"
+
+ # TODO(teravest): Fix speeds here.
+ register "i2c[3]" = "{
+ .speed = I2C_SPEED_FAST,
+ .rise_time_ns = 104,
+ .fall_time_ns = 52,
+ }"
+
device cpu_cluster 0 on
device lapic 10 on end
end