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authorNico Huber <nico.h@gmx.de>2018-05-27 14:01:11 +0200
committerNico Huber <nico.h@gmx.de>2018-05-31 15:11:21 +0000
commit9593e973fa0e3a104837d1df9659b3992d915b34 (patch)
tree8f0aace9603886d215e22c294355a9e5b769133d /src/mainboard
parent654cc2fe109ea1be4d22447b3d0e6eb22a75b550 (diff)
soc/{amd,intel}: Use CACHE_ROM_(BASE|SIZE)
Boards could choose a high ROM_SIZE that would result in an MTRR config that conflicts with other resources. Thus, always use the filtered CACHE_ROM_SIZE. Change-Id: I66d36b84ce49c1cb98cb36a4731977baaedf3225 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26575 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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