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authorDtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>2022-05-27 17:05:34 +0800
committerMartin L Roth <gaumless@tutanota.com>2022-05-30 01:04:56 +0000
commit8dd47aea049ce01adf472d651cfb2ab3ac85ca38 (patch)
treebbda72e0cf56efe8823392ad96542be64bed3307 /src/mainboard
parent10a500eb324f0deea0bc9bf89e9f7bb185fcd05a (diff)
mb/google/brya/var/kinox: Correct the target of DPTF active policy
Kinox has four temperature sensors. Modify the target of DPTF active policy to map correct temperature sensor. BUG=b:231380286 TEST=Boot to Chrome OS and doesn't see "DPTF: Invalid sensor ID" from ec comsole. Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com> Change-Id: Icb5c285a6f483e2a1b6510a962ff7f7f6e9a79e3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/kinox/overridetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb
index 93f1d5370d..d5fd7cf180 100644
--- a/src/mainboard/google/brya/variants/kinox/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb
@@ -71,7 +71,7 @@ chip soc/intel/alderlake
}
},
[1] = {
- .target = DPTF_TEMP_SENSOR_1,
+ .target = DPTF_TEMP_SENSOR_0,
.thresholds = {
TEMP_PCT(75, 97),
TEMP_PCT(70, 93),
@@ -84,7 +84,7 @@ chip soc/intel/alderlake
}
},
[2] = {
- .target = DPTF_TEMP_SENSOR_2,
+ .target = DPTF_TEMP_SENSOR_1,
.thresholds = {
TEMP_PCT(75, 97),
TEMP_PCT(70, 93),
@@ -97,7 +97,7 @@ chip soc/intel/alderlake
}
},
[3] = {
- .target = DPTF_TEMP_SENSOR_3,
+ .target = DPTF_TEMP_SENSOR_2,
.thresholds = {
TEMP_PCT(75, 97),
TEMP_PCT(70, 93),
@@ -110,7 +110,7 @@ chip soc/intel/alderlake
}
},
[4] = {
- .target = DPTF_TEMP_SENSOR_4,
+ .target = DPTF_TEMP_SENSOR_3,
.thresholds = {
TEMP_PCT(75, 97),
TEMP_PCT(70, 93),