diff options
author | David Wu <david_wu@quanta.corp-partner.google.com> | 2023-08-23 11:12:22 +0800 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-08-25 14:41:30 +0000 |
commit | 8a584830721f09cc677f17cfa6c0a1de06cfacc3 (patch) | |
tree | afd6611437929b1c253c2ac6eb9ca701d9d41c39 /src/mainboard | |
parent | c61be60b977d0c485da73b0c21c7e434fbada402 (diff) |
mb/google/brask/var/kuldax: Set customized_leds value for RTL8111K
Set customized_leds value for RTL8111K to fix led can't work.
BUG=b:297093096
BRANCH=firmware-brya-14505.B
TEST=Verified RTL8125 and RTL8111K led can work normally.
Change-Id: Icb8624005e7e24398abdd242570970c6bfa8a09f
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77390
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/brya/variants/kuldax/overridetree.cb | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mainboard/google/brya/variants/kuldax/overridetree.cb b/src/mainboard/google/brya/variants/kuldax/overridetree.cb index 41a9e28198..ee46529dc6 100644 --- a/src/mainboard/google/brya/variants/kuldax/overridetree.cb +++ b/src/mainboard/google/brya/variants/kuldax/overridetree.cb @@ -198,13 +198,14 @@ chip soc/intel/alderlake chip drivers/net register "wake" = "GPE0_DW0_07" register "led_feature" = "0xe0" + register "customized_leds" = "0x05af" register "customized_led0" = "0x23f" register "customized_led2" = "0x028" register "enable_aspm_l1_2" = "1" register "add_acpi_dma_property" = "true" device pci 00.0 on end end - end # RTL8125 Ethernet NIC + end # RTL8125 and RTL8111K Ethernet NIC device ref pcie_rp8 on chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)" |