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authorFred Reitberger <reitbergerfred@gmail.com>2023-06-01 18:55:16 -0400
committerFred Reitberger <reitbergerfred@gmail.com>2023-06-08 17:39:14 +0000
commit8880baf6bc55a16485f523113e72f119cc9da8c5 (patch)
tree5a7b58d564d81c0159c00f7442fbcf84ebb1c21a /src/mainboard
parent301e03fd4a4fa5a8277a7e287ab8d8649a8a90ec (diff)
mb/google/myst/bootblock.c: Initialize spi flash
Initialize the SPI Flash in bootblock to ensure that CONFIG_SPI_FLASH_EXIT_4_BYTE_ADDR_MODE will exit 4-byte addressing mode. BUG=b:285110121 TEST=boot myst and verify flash operations work correctly Change-Id: Ia88d2b46884b096b4c558bc86513159ec6d35eb5 Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/75588 Reviewed-by: Jon Murphy <jpmurphy@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/myst/bootblock.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/myst/bootblock.c b/src/mainboard/google/myst/bootblock.c
index 440466697b..29d0a5a89e 100644
--- a/src/mainboard/google/myst/bootblock.c
+++ b/src/mainboard/google/myst/bootblock.c
@@ -3,7 +3,9 @@
#include <amdblocks/espi.h>
#include <bootblock_common.h>
#include <baseboard/variants.h>
+#include <console/console.h>
#include <soc/espi.h>
+#include <spi_flash.h>
void mb_set_up_early_espi(void)
{
@@ -35,4 +37,8 @@ void bootblock_mainboard_init(void)
variant_bootblock_gpio_table(&gpios, &num_gpios);
gpio_configure_pads(gpios, num_gpios);
+
+ // TODO: b:285110121 - temp workaround is to add a dummy flash call
+ const struct spi_flash *spi = boot_device_spi_flash();
+ printk(BIOS_DEBUG, "Initialized spi flash %p\n", spi);
}