aboutsummaryrefslogtreecommitdiff
path: root/src/mainboard
diff options
context:
space:
mode:
authorSean Rhodes <sean@starlabs.systems>2022-05-26 20:46:35 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-06-20 12:03:35 +0000
commit840915bb8a934fac4830e1a029808e21741b0cac (patch)
tree93a48b30ddd6c0a47fd41e12233aa4c4e7b56b68 /src/mainboard
parente07ac22487a5bb2981e61b179a48de57fdf5c308 (diff)
mb/starlabs/labtop/cml: Organise USB ports by hardware port
Group the USB ports by hardware ports, rather than separate USB 2.0 and 3.0 interfaces. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ie9bc6b3e20dddeb14cea195ef9a719432f66c6e1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64702 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/starlabs/labtop/variants/cml/devicetree.cb17
1 files changed, 8 insertions, 9 deletions
diff --git a/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb b/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb
index b3d7f34a4c..3bf0d7a74b 100644
--- a/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb
+++ b/src/mainboard/starlabs/labtop/variants/cml/devicetree.cb
@@ -67,27 +67,26 @@ chip soc/intel/cannonlake
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
device pci 14.0 on # USB xHCI
- ### USB 2.0 Devices
# Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
+ register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
+
# Motherboard USB 3.0
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
+
# Daughterboard SD Card
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)"
+
# Daughterboard USB 3.0
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)"
+ register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
+
# Internal Webcam
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
+
# Internal Bluetooth
register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"
-
- ### USB 3.0 Devices
- # Motherboard USB Type C
- register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
- # Motherboard USB 3.0
- register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)"
- # Daughterboard USB 3.0
- register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)"
end
device pci 14.1 off end # USB xDCI (OTG)
device pci 14.3 on # CNVi