diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2022-06-07 22:45:20 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-09 16:08:34 +0000 |
| commit | 7a21e53cbf145ef0b3f86597013ba8967a8fed6e (patch) | |
| tree | 4b777b895d1b686ed7bc40fdc46bda162b687dee /src/mainboard | |
| parent | 6f88d7cabe35521c1f2a6c0deeda640aad92ce20 (diff) | |
mb/starlabs/lite: Disable Burst in Power Saver profile
When the CMOS option `power_profile` is set to Power Saver, disable
Burst.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4d9367306b3c0e83252cea3ee4c2733c8729d10c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/starlabs/lite/devtree.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/starlabs/lite/devtree.c b/src/mainboard/starlabs/lite/devtree.c index 0bd1cf816e..d3f8100b5d 100644 --- a/src/mainboard/starlabs/lite/devtree.c +++ b/src/mainboard/starlabs/lite/devtree.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <cpu/intel/turbo.h> #include <device/device.h> #include <device/pci_def.h> #include <option.h> @@ -26,6 +27,7 @@ void devtree_update(void) /* Update PL1 & PL2 based on CMOS settings */ switch (get_power_profile(PP_POWER_SAVER)) { case PP_POWER_SAVER: + disable_turbo(); soc_conf->tdp_pl1_override = 6; soc_conf->tdp_pl2_override = 10; cfg->tcc_offset = 15; |