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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-10-16 13:51:51 -0500
committerMartin Roth <martinroth@google.com>2015-11-02 23:45:19 +0100
commit730a043fb6cb4dd3cb5af8f8640365727b598648 (patch)
tree59afe45caca1a8e1682939c7e44e95344104533e /src/mainboard
parentd150006c4a4584bc9933c2d8ff580a54c4f0cc2a (diff)
cpu/amd: Add initial AMD Family 15h support
TEST: Booted ASUS KGPE-D16 with single Opteron 6380 * Unbuffered DDR3 DIMMs tested and working * Suspend to RAM (S3) tested and working Change-Id: Idffd2ce36ce183fbfa087e5ba69a9148f084b45e Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/11966 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/advansus/a785e-i/romstage.c2
-rw-r--r--src/mainboard/amd/bimini_fam10/romstage.c2
-rw-r--r--src/mainboard/amd/mahogany_fam10/romstage.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/romstage.c2
-rw-r--r--src/mainboard/amd/tilapia_fam10/romstage.c2
-rw-r--r--src/mainboard/asus/kfsn4-dre/romstage.c2
-rw-r--r--src/mainboard/asus/kgpe-d16/romstage.c2
-rw-r--r--src/mainboard/asus/m4a78-em/romstage.c2
-rw-r--r--src/mainboard/asus/m4a785-m/romstage.c2
-rw-r--r--src/mainboard/asus/m5a88-v/romstage.c2
-rw-r--r--src/mainboard/avalue/eax-785e/romstage.c2
-rw-r--r--src/mainboard/gigabyte/ma785gm/romstage.c2
-rw-r--r--src/mainboard/gigabyte/ma785gmt/romstage.c2
-rw-r--r--src/mainboard/gigabyte/ma78gm/romstage.c2
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/romstage.c2
-rw-r--r--src/mainboard/iei/kino-780am2-fam10/romstage.c2
-rw-r--r--src/mainboard/jetway/pa78vm5/romstage.c2
-rw-r--r--src/mainboard/msi/ms9652_fam10/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8qme_fam10/romstage.c2
-rw-r--r--src/mainboard/supermicro/h8scm_fam10/romstage.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/romstage.c2
22 files changed, 22 insertions, 22 deletions
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c
index 3509befb86..b17fb2bcf1 100644
--- a/src/mainboard/advansus/a785e-i/romstage.c
+++ b/src/mainboard/advansus/a785e-i/romstage.c
@@ -127,7 +127,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c
index 3649e84f91..11d54797ea 100644
--- a/src/mainboard/amd/bimini_fam10/romstage.c
+++ b/src/mainboard/amd/bimini_fam10/romstage.c
@@ -119,7 +119,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c
index e9f240c2e4..5b39bb7304 100644
--- a/src/mainboard/amd/mahogany_fam10/romstage.c
+++ b/src/mainboard/amd/mahogany_fam10/romstage.c
@@ -121,7 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
index 6bd548bf49..5131f36d9a 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
@@ -227,7 +227,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c
index d49ed577a9..0804b32eca 100644
--- a/src/mainboard/amd/tilapia_fam10/romstage.c
+++ b/src/mainboard/amd/tilapia_fam10/romstage.c
@@ -121,7 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/asus/kfsn4-dre/romstage.c b/src/mainboard/asus/kfsn4-dre/romstage.c
index 3abf27def6..8686be725b 100644
--- a/src/mainboard/asus/kfsn4-dre/romstage.c
+++ b/src/mainboard/asus/kfsn4-dre/romstage.c
@@ -241,7 +241,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/asus/kgpe-d16/romstage.c b/src/mainboard/asus/kgpe-d16/romstage.c
index 8020b5ea6a..76cbb8ee2e 100644
--- a/src/mainboard/asus/kgpe-d16/romstage.c
+++ b/src/mainboard/asus/kgpe-d16/romstage.c
@@ -358,7 +358,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/asus/m4a78-em/romstage.c b/src/mainboard/asus/m4a78-em/romstage.c
index d2d098b889..f717ed8352 100644
--- a/src/mainboard/asus/m4a78-em/romstage.c
+++ b/src/mainboard/asus/m4a78-em/romstage.c
@@ -123,7 +123,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/asus/m4a785-m/romstage.c b/src/mainboard/asus/m4a785-m/romstage.c
index bfed77e5cd..47d884cfdb 100644
--- a/src/mainboard/asus/m4a785-m/romstage.c
+++ b/src/mainboard/asus/m4a785-m/romstage.c
@@ -123,7 +123,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c
index 91e2dead07..b69fd80518 100644
--- a/src/mainboard/asus/m5a88-v/romstage.c
+++ b/src/mainboard/asus/m5a88-v/romstage.c
@@ -124,7 +124,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c
index d4e398074e..ed85c8258d 100644
--- a/src/mainboard/avalue/eax-785e/romstage.c
+++ b/src/mainboard/avalue/eax-785e/romstage.c
@@ -128,7 +128,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/gigabyte/ma785gm/romstage.c b/src/mainboard/gigabyte/ma785gm/romstage.c
index 0166fb39d4..c5a04330d2 100644
--- a/src/mainboard/gigabyte/ma785gm/romstage.c
+++ b/src/mainboard/gigabyte/ma785gm/romstage.c
@@ -118,7 +118,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c
index 4b8c6ca221..743463da5f 100644
--- a/src/mainboard/gigabyte/ma785gmt/romstage.c
+++ b/src/mainboard/gigabyte/ma785gmt/romstage.c
@@ -118,7 +118,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/gigabyte/ma78gm/romstage.c b/src/mainboard/gigabyte/ma78gm/romstage.c
index 69f6d3aeb2..aee7fbec35 100644
--- a/src/mainboard/gigabyte/ma78gm/romstage.c
+++ b/src/mainboard/gigabyte/ma78gm/romstage.c
@@ -121,7 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/hp/dl165_g6_fam10/romstage.c b/src/mainboard/hp/dl165_g6_fam10/romstage.c
index e93301cafe..bf1b73456b 100644
--- a/src/mainboard/hp/dl165_g6_fam10/romstage.c
+++ b/src/mainboard/hp/dl165_g6_fam10/romstage.c
@@ -133,7 +133,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/iei/kino-780am2-fam10/romstage.c b/src/mainboard/iei/kino-780am2-fam10/romstage.c
index 417452f1a2..bb0ba572b6 100644
--- a/src/mainboard/iei/kino-780am2-fam10/romstage.c
+++ b/src/mainboard/iei/kino-780am2-fam10/romstage.c
@@ -121,7 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/jetway/pa78vm5/romstage.c b/src/mainboard/jetway/pa78vm5/romstage.c
index c3a1839352..9144f3282e 100644
--- a/src/mainboard/jetway/pa78vm5/romstage.c
+++ b/src/mainboard/jetway/pa78vm5/romstage.c
@@ -126,7 +126,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/msi/ms9652_fam10/romstage.c b/src/mainboard/msi/ms9652_fam10/romstage.c
index de90d86908..cb4d02feba 100644
--- a/src/mainboard/msi/ms9652_fam10/romstage.c
+++ b/src/mainboard/msi/ms9652_fam10/romstage.c
@@ -146,7 +146,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/supermicro/h8dmr_fam10/romstage.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
index 9e32e53542..c29470f766 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
@@ -142,7 +142,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
index f369b33b50..eacc87f925 100644
--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c
@@ -210,7 +210,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
diff --git a/src/mainboard/supermicro/h8scm_fam10/romstage.c b/src/mainboard/supermicro/h8scm_fam10/romstage.c
index ff40e69250..6e34f0ac88 100644
--- a/src/mainboard/supermicro/h8scm_fam10/romstage.c
+++ b/src/mainboard/supermicro/h8scm_fam10/romstage.c
@@ -132,7 +132,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
/* TODO: The Kernel must support 12 processor, otherwise the interrupt
diff --git a/src/mainboard/tyan/s2912_fam10/romstage.c b/src/mainboard/tyan/s2912_fam10/romstage.c
index 9bb09ac7aa..9f25d271c4 100644
--- a/src/mainboard/tyan/s2912_fam10/romstage.c
+++ b/src/mainboard/tyan/s2912_fam10/romstage.c
@@ -145,7 +145,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
post_code(0x33);
- cpuSetAMDMSR();
+ cpuSetAMDMSR(0);
post_code(0x34);
amd_ht_init(sysinfo);
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-26 14:15:52 +0000