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authorJonas Loeffelholz <Jonas.Loeffelholz@9elements.com>2020-06-25 15:00:33 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-07-01 05:22:39 +0000
commit72afe02cfc38b888d4666dbb97b846afea30b009 (patch)
treef94670841533d5bb598254bb7e200b8318a4a1dd /src/mainboard
parentd7238eb5180da0272be4212a9c6c54c685234b99 (diff)
mb/prodrive/hermes/variants/baseboard: configure sataHotplug
Configure sataHotPlug in devicetree, as this functionality is now available for this soc. Change-Id: If462e33d1bbef8036d598970fb2774d0fda1fbb1 Signed-off-by: Jonas Loeffelholz <Jonas.Loeffelholz@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42804 Reviewed-by: Christian Walter <christian.walter@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
index a56096ec04..6c6fe2d941 100644
--- a/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
+++ b/src/mainboard/prodrive/hermes/variants/baseboard/overridetree.cb
@@ -19,6 +19,15 @@ chip soc/intel/cannonlake
register "SataPortsEnable[6]" = "1"
register "SataPortsEnable[7]" = "1"
+ register "SataPortsHotPlug[0]" = "1"
+ register "SataPortsHotPlug[1]" = "1"
+ register "SataPortsHotPlug[2]" = "0"
+ register "SataPortsHotPlug[3]" = "0"
+ register "SataPortsHotPlug[4]" = "1"
+ register "SataPortsHotPlug[5]" = "1"
+ register "SataPortsHotPlug[6]" = "1"
+ register "SataPortsHotPlug[7]" = "1"
+
register "PchHdaDspEnable" = "0"
register "PchHdaAudioLinkHda" = "1"