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authorShawn Nematbakhsh <shawnn@chromium.org>2013-12-05 14:57:08 -0800
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-08 07:07:07 +0200
commit70cc9084a51e7f276b20d146fdab5fda6884febb (patch)
treebb5aa3c575d02673ea0a1dec302a6416377d8b58 /src/mainboard
parentfad3703ce80011ccc0eaef03fb0575f591085d5f (diff)
rambi: Change eMMC pin PUs to 2K
Strengthen PUs on all eMMC pins to fix problems with eMMC not coming up on certain boards. BUG=chrome-os-partner:24353 TEST=Manual. Burn FW on board that previously failed to boot eMMC, verify chromeos can now install + boot from eMMC. BRANCH=none Change-Id: I7a9742968b8b8c2c42285ffc21de46aed9c87fb7 Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/178917 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4991 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/rambi/gpio.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/src/mainboard/google/rambi/gpio.c b/src/mainboard/google/rambi/gpio.c
index 68a5970345..3bc6bd89e6 100644
--- a/src/mainboard/google/rambi/gpio.c
+++ b/src/mainboard/google/rambi/gpio.c
@@ -72,17 +72,18 @@ static const struct soc_gpio_map gpscore_gpio_map[] = {
GPIO_NC, /* S0-SC013 - NC */
GPIO_INPUT, /* S0-SC014 - DET_TRIGGER - INT */
GPIO_INPUT, /* S0-SC015 - AJACK_MICPRES_L - INT */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC016 - MMC1_45_CLK */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC017 - MMC1_45_D[0] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC018 - MMC1_45_D[1] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC019 - MMC1_45_D[2] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC020 - MMC1_45_D[3] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC021 - MMC1_45_D[4] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC022 - MMC1_45_D[5] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC023 - MMC1_45_D[6] */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC024 - MMC1_45_D[7] */
+ /* TODO(shawnn): Investigate if these PUs can be weakened. */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC016 - MMC1_45_CLK */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC017 - MMC1_45_D[0] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC018 - MMC1_45_D[1] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC019 - MMC1_45_D[2] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC020 - MMC1_45_D[3] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC021 - MMC1_45_D[4] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC022 - MMC1_45_D[5] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC023 - MMC1_45_D[6] */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC024 - MMC1_45_D[7] */
GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC025 - MMC1_45_CMD */
- GPIO_FUNC(3, PULL_UP, 10K), /* S0-SC026 - MMC1_45_RST */
+ GPIO_FUNC(3, PULL_UP, 2K), /* S0-SC026 - MMC1_45_RST */
GPIO_NC, /* S0-SC027 - NC */
GPIO_NC, /* S0-SC028 - NC */
GPIO_NC, /* S0-SC029 - NC */