mainboard/lenovo/x230: Add ThinkPad x230s as a variant

The code is based on autoport and that for X230. Major differences are:
    - Only one DDR3 slot
    - HM77 PCH
    - M.2 socket instead of mini pci-e
    - no docking
    - no tpm

Tested:
    - CPU i5-3337U
    - Slotted DIMM 8GiB
    - Camera
    - pci-e and usb2 on M.2 slot with A key for wlan
    - sata and usb2  (no superspeed components) on M.2 slot with B key for wwan
    - On board SDHCI connected to pci-e
    - USB3 ports
    - libgfxinit-based graphic init
    - NVRAM options for North and South bridges
    - Sound
    - Thinkpad EC
    - S3
    - Linux 4.9 within Debian GNU/Linux stable, loaded from
      Seabios.

Untested:
    - Touch screen, which is said to work under ubuntu but not debian.

Change-Id: Ie537645d5ffaee799e79af2f821f80c3ebd2dfec
Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41168
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

20 files changed, 494 insertions, 99 deletions

diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
index 7d563efb2b..454b589b76 100644
--- a/src/mainboard/lenovo/x230/Kconfig
+++ b/src/mainboard/lenovo/x230/Kconfig
@@ -1,4 +1,4 @@
-if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
 
 config BOARD_SPECIFIC_OPTIONS
 	def_bool y
@@ -10,17 +10,18 @@ config BOARD_SPECIFIC_OPTIONS
 	select EC_LENOVO_H8
 	select H8_HAS_BAT_TRESHOLDS_IMPL
 	select NO_UART_ON_SUPERIO
-	select BOARD_ROMSIZE_KB_12288
+	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+	select BOARD_ROMSIZE_KB_16384 if BOARD_LENOVO_X230S
 	select HAVE_ACPI_TABLES
 	select HAVE_OPTION_TABLE
 	select HAVE_CMOS_DEFAULT
 	select HAVE_ACPI_RESUME
 	select INTEL_INT15
 	select DRIVERS_RICOH_RCE822
-	select MAINBOARD_HAS_LPC_TPM
-	select MAINBOARD_HAS_TPM1
+	select MAINBOARD_HAS_LPC_TPM if !BOARD_LENOVO_X230S
+	select MAINBOARD_HAS_TPM1 if !BOARD_LENOVO_X230S
 	select MAINBOARD_HAS_LIBGFXINIT
-	select GFX_GMA_PANEL_1_ON_LVDS
+	select GFX_GMA_PANEL_1_ON_LVDS if !BOARD_LENOVO_X230S
 	select INTEL_GMA_HAVE_VBT
 	select MAINBOARD_USES_IFD_GBE_REGION
 
@@ -50,10 +51,20 @@ config MAINBOARD_DIR
 	string
 	default "lenovo/x230"
 
+config VARIANT_DIR
+	string
+	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+	default "x230s" if BOARD_LENOVO_X230S
+
 config MAINBOARD_PART_NUMBER
 	string
 	default "ThinkPad X230" if BOARD_LENOVO_X230
 	default "ThinkPad X230t" if BOARD_LENOVO_X230T
+	default "ThinkPad X230s" if BOARD_LENOVO_X230S
+
+config OVERRIDE_DEVICETREE
+	string
+	default "variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
 
 config MAX_CPUS
 	int
@@ -81,4 +92,4 @@ config PS2K_EISAID
 config PS2M_EISAID
 	default "LEN0020"
 
-endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
+endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S
diff --git a/src/mainboard/lenovo/x230/Kconfig.name b/src/mainboard/lenovo/x230/Kconfig.name
index 10fdc2ed11..1a01436879 100644
--- a/src/mainboard/lenovo/x230/Kconfig.name
+++ b/src/mainboard/lenovo/x230/Kconfig.name
@@ -3,3 +3,6 @@ config BOARD_LENOVO_X230
 
 config BOARD_LENOVO_X230T
 	bool "ThinkPad X230t"
+
+config BOARD_LENOVO_X230S
+	bool "ThinkPad X230s"
diff --git a/src/mainboard/lenovo/x230/Makefile.inc b/src/mainboard/lenovo/x230/Makefile.inc
index b9d5597932..fc8c35995a 100644
--- a/src/mainboard/lenovo/x230/Makefile.inc
+++ b/src/mainboard/lenovo/x230/Makefile.inc
@@ -4,9 +4,9 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 
 smm-y += smihandler.c
-bootblock-y += gpio.c
-romstage-y += gpio.c
-
-ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
-bootblock-y += early_init.c
-romstage-y += early_init.c
+bootblock-y += variants/$(VARIANT_DIR)/early_init.c
+bootblock-y += variants/$(VARIANT_DIR)/gpio.c
+romstage-y += variants/$(VARIANT_DIR)/early_init.c
+romstage-y += variants/$(VARIANT_DIR)/gpio.c
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
diff --git a/src/mainboard/lenovo/x230/board_info.txt b/src/mainboard/lenovo/x230/board_info.txt
index 09ddde1f85..505c59a58b 100644
--- a/src/mainboard/lenovo/x230/board_info.txt
+++ b/src/mainboard/lenovo/x230/board_info.txt
@@ -1,4 +1,5 @@
 Category: laptop
+Board name: ThinkPad X230 baseboard
 ROM package: SOIC-8
 ROM protocol: SPI
 ROM socketed: n
diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index e34734c4c3..52a4cd3e47 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -60,7 +60,8 @@ chip northbridge/intel/sandybridge
 
 			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
 
-			register "xhci_switchable_ports" = "0xf"
+			# Wire port 4 (wwan usb) to ehci for it lacks superspeed components
+			register "xhci_switchable_ports" = "0x7"
 			register "superspeed_capable_ports" = "0xf"
 			register "xhci_overcurrent_mapping" = "0x4000201"
 
@@ -89,9 +90,7 @@ chip northbridge/intel/sandybridge
 				end
 			end # PCIe Port #1
 			device pci 1c.1 on end # PCIe Port #2
-			device pci 1c.2 on
-				smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
-			end # PCIe Port #3 (expresscard)
+			device pci 1c.2 off end # PCIe Port #3
 			device pci 1c.3 off end # PCIe Port #4
 			device pci 1c.4 off end # PCIe Port #5
 			device pci 1c.5 off end # PCIe Port #6
@@ -136,7 +135,6 @@ chip northbridge/intel/sandybridge
 					register "event7_enable" = "0x01"
 					register "event8_enable" = "0x7b"
 					register "event9_enable" = "0xff"
-					register "eventa_enable" = "0x01"
 					register "eventb_enable" = "0x00"
 					register "eventc_enable" = "0xff"
 					register "eventd_enable" = "0xff"
diff --git a/src/mainboard/lenovo/x230/hda_verb.c b/src/mainboard/lenovo/x230/hda_verb.c
index 05fb3fd775..2997587d82 100644
--- a/src/mainboard/lenovo/x230/hda_verb.c
+++ b/src/mainboard/lenovo/x230/hda_verb.c
@@ -1,82 +1 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-/* Bits 31:28 - Codec Address */
-/* Bits 27:20 - NID */
-/* Bits 19:8 - Verb ID */
-/* Bits 7:0  - Payload */
-
-#include <device/azalia_device.h>
-
-const u32 cim_verb_data[] = {
-	/* --- Codec #0 --- */
-	0x10ec0269,	/* Codec Vendor / Device ID: Realtek ALC269VC */
-	0x17aa21fa,	/* Subsystem ID */
-	19,		/* Number of 4 dword sets */
-	AZALIA_SUBVENDOR(0, 0x17aa21fa),
-
-	/* Ext. Microphone Connector:	External,Right; MicIn,3.5mm; Black,JD; DA,Seq */
-	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
-
-	/* Headphones Connector:	External,Right; HP,3.5mm; Black,JD; DA,Seq */
-	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
-
-	/* Not connected:		N/A,N/A; Other,Unknown; Unknown,JD; DA,Seq */
-	AZALIA_PIN_CFG(0, 0x0c, 0x40f000f0),
-
-	/* Internal Speakers		Fixed,Int; Speaker,Other Analog; Unknown,nJD; DA,Seq */
-	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
-
-	/* Not connected */
-	AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
-
-	/* Internal Microphone:		Fixed,Int,Top; Mic In,ATIPI; Unknown,nJD; DA,Seq */
-	AZALIA_PIN_CFG(0, 0x11, 0xd5a30140),
-	AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
-	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
-	AZALIA_PIN_CFG(0, 0x15, 0x03211020),
-	AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
-	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
-	AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
-	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
-
-	/* Misc entries */
-	0x01970804,
-	0x01870803,
-	0x01470740,
-	0x00970640,
-
-	0x00370680,
-	0x00270680,
-	0x01470c02,
-	0x01570c02,
-
-	/* ALC coefficients. */
-	/* 08 */
-	0x02050008,
-	0x02040700,
-	/* 18 */
-	0x02050018,
-	0x02045184,
-	/* 1c */
-	0x0205001c,
-	0x02042800,
-
-	0x01870724, /* Enable Vrefout for mic */
-	0x00170500, /* Set power state to D0 */
-
-	/* --- Codec #3 --- */
-	0x80862806,	/* Codec Vendor / Device ID: Intel PantherPoint HDMI */
-	0x80860101,	/* Subsystem ID */
-	4,		/* Number of 4 dword sets */
-	AZALIA_SUBVENDOR(3, 0x80860101),
-	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
-	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
-	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
-};
-
-const u32 pc_beep_verbs[] = {
-	0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */
-};
-
-AZALIA_ARRAY_SIZES;
+/* dummy */
diff --git a/src/mainboard/lenovo/x230/variants/x230/board_info.txt b/src/mainboard/lenovo/x230/variants/x230/board_info.txt
new file mode 100644
index 0000000000..22281e6aa8
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230/board_info.txt
@@ -0,0 +1,7 @@
+Category: laptop
+Board name: ThinkPad X230
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: n
+Release year: 2012
diff --git a/src/mainboard/lenovo/x230/data.vbt b/src/mainboard/lenovo/x230/variants/x230/data.vbt
index 0f50d706c1..0f50d706c1 100644
--- a/src/mainboard/lenovo/x230/data.vbt
+++ b/src/mainboard/lenovo/x230/variants/x230/data.vbt
diff --git a/src/mainboard/lenovo/x230/early_init.c b/src/mainboard/lenovo/x230/variants/x230/early_init.c
index 2089ee6bb2..2089ee6bb2 100644
--- a/src/mainboard/lenovo/x230/early_init.c
+++ b/src/mainboard/lenovo/x230/variants/x230/early_init.c
diff --git a/src/mainboard/lenovo/x230/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230/gma-mainboard.ads
index 3df1e37f3e..3df1e37f3e 100644
--- a/src/mainboard/lenovo/x230/gma-mainboard.ads
+++ b/src/mainboard/lenovo/x230/variants/x230/gma-mainboard.ads
diff --git a/src/mainboard/lenovo/x230/gpio.c b/src/mainboard/lenovo/x230/variants/x230/gpio.c
index 8de285b34f..8de285b34f 100644
--- a/src/mainboard/lenovo/x230/gpio.c
+++ b/src/mainboard/lenovo/x230/variants/x230/gpio.c
diff --git a/src/mainboard/lenovo/x230/variants/x230/hda_verb.c b/src/mainboard/lenovo/x230/variants/x230/hda_verb.c
new file mode 100644
index 0000000000..05fb3fd775
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230/hda_verb.c
@@ -0,0 +1,82 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* Bits 31:28 - Codec Address */
+/* Bits 27:20 - NID */
+/* Bits 19:8 - Verb ID */
+/* Bits 7:0  - Payload */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* --- Codec #0 --- */
+	0x10ec0269,	/* Codec Vendor / Device ID: Realtek ALC269VC */
+	0x17aa21fa,	/* Subsystem ID */
+	19,		/* Number of 4 dword sets */
+	AZALIA_SUBVENDOR(0, 0x17aa21fa),
+
+	/* Ext. Microphone Connector:	External,Right; MicIn,3.5mm; Black,JD; DA,Seq */
+	AZALIA_PIN_CFG(0, 0x0a, 0x04a11020),
+
+	/* Headphones Connector:	External,Right; HP,3.5mm; Black,JD; DA,Seq */
+	AZALIA_PIN_CFG(0, 0x0b, 0x0421101f),
+
+	/* Not connected:		N/A,N/A; Other,Unknown; Unknown,JD; DA,Seq */
+	AZALIA_PIN_CFG(0, 0x0c, 0x40f000f0),
+
+	/* Internal Speakers		Fixed,Int; Speaker,Other Analog; Unknown,nJD; DA,Seq */
+	AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
+
+	/* Not connected */
+	AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
+
+	/* Internal Microphone:		Fixed,Int,Top; Mic In,ATIPI; Unknown,nJD; DA,Seq */
+	AZALIA_PIN_CFG(0, 0x11, 0xd5a30140),
+	AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
+	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x15, 0x03211020),
+	AZALIA_PIN_CFG(0, 0x18, 0x03a11830),
+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x40138205),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+
+	/* Misc entries */
+	0x01970804,
+	0x01870803,
+	0x01470740,
+	0x00970640,
+
+	0x00370680,
+	0x00270680,
+	0x01470c02,
+	0x01570c02,
+
+	/* ALC coefficients. */
+	/* 08 */
+	0x02050008,
+	0x02040700,
+	/* 18 */
+	0x02050018,
+	0x02045184,
+	/* 1c */
+	0x0205001c,
+	0x02042800,
+
+	0x01870724, /* Enable Vrefout for mic */
+	0x00170500, /* Set power state to D0 */
+
+	/* --- Codec #3 --- */
+	0x80862806,	/* Codec Vendor / Device ID: Intel PantherPoint HDMI */
+	0x80860101,	/* Subsystem ID */
+	4,		/* Number of 4 dword sets */
+	AZALIA_SUBVENDOR(3, 0x80860101),
+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
+	AZALIA_PIN_CFG(3, 0x06, 0x18560020),
+	AZALIA_PIN_CFG(3, 0x07, 0x18560030),
+};
+
+const u32 pc_beep_verbs[] = {
+	0x02177a00, /* Digital PCBEEP Gain: 0h=-9db, 1h=-6db ... 4h=+3db, 5h=+6db */
+};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/lenovo/x230/variants/x230/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb
new file mode 100644
index 0000000000..8f1a97d9dd
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230/overridetree.cb
@@ -0,0 +1,15 @@
+chip northbridge/intel/sandybridge
+	device domain 0x0 on
+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+			register "docking_supported" = "1"
+			device pci 1c.2 on
+				smbios_slot_desc "7" "3" "ExpressCard Slot" "8"
+			end # PCIe Port #3 (expresscard)
+			device pci 1f.0 on # LPC bridge
+				chip ec/lenovo/h8
+					register "eventa_enable" = "0x01"
+				end
+			end # LPC Controller
+		end
+	end
+end
diff --git a/src/mainboard/lenovo/x230/variants/x230s/board_info.txt b/src/mainboard/lenovo/x230/variants/x230s/board_info.txt
new file mode 100644
index 0000000000..67b229455a
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/board_info.txt
@@ -0,0 +1,7 @@
+Category: laptop
+Board name: ThinkPad X230s
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: n
+Release year: 2013
diff --git a/src/mainboard/lenovo/x230/variants/x230s/data.vbt b/src/mainboard/lenovo/x230/variants/x230s/data.vbt
new file mode 100644
index 0000000000..42b0394daa
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/data.vbt
diff --git a/src/mainboard/lenovo/x230/variants/x230s/early_init.c b/src/mainboard/lenovo/x230/variants/x230s/early_init.c
new file mode 100644
index 0000000000..0b4c084f77
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/early_init.c
@@ -0,0 +1,49 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* FIXME: Check if all includes are needed. */
+
+#include <stdint.h>
+#include <string.h>
+#include <timestamp.h>
+#include <arch/byteorder.h>
+#include <device/mmio.h>
+#include <device/pci_ops.h>
+#include <device/pnp_ops.h>
+#include <console/console.h>
+#include <bootblock_common.h>
+#include <northbridge/intel/sandybridge/sandybridge.h>
+#include <northbridge/intel/sandybridge/raminit_native.h>
+#include <southbridge/intel/bd82x6x/pch.h>
+#include <southbridge/intel/common/gpio.h>
+
+const struct southbridge_usb_port mainboard_usb_ports[] = {
+	{ 1, 3, 0 },
+	{ 1, 3, 1 },
+	{ 0, 1, 3 },
+	{ 1, 3, -1 },
+	{ 0, 1, 2 },
+	{ 0, 1, -1 },
+	{ 0, 1, -1 },
+	{ 0, 1, -1 },
+	{ 0, 1, -1 },
+	{ 0, 1, 5 },
+	{ 1, 1, -1 },
+	{ 0, 1, -1 },
+	{ 1, 3, -1 },
+	{ 1, 1, -1 },
+};
+
+void bootblock_mainboard_early_init(void)
+{
+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x3f0f);
+	pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010);
+}
+
+/* FIXME: Put proper SPD map here. */
+void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+{
+	read_spd(&spd[0], 0x50, id_only);
+	read_spd(&spd[1], 0x52, id_only);
+	read_spd(&spd[2], 0x51, id_only);
+	read_spd(&spd[3], 0x53, id_only);
+}
diff --git a/src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads
new file mode 100644
index 0000000000..fb75293b81
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/gma-mainboard.ads
@@ -0,0 +1,22 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+   ports : constant Port_List :=
+     (DP1,
+      DP2,
+      DP3,
+      HDMI1,
+      HDMI2,
+      HDMI3,
+      Analog,
+      EDP,
+      others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/lenovo/x230/variants/x230s/gpio.c b/src/mainboard/lenovo/x230/variants/x230s/gpio.c
new file mode 100644
index 0000000000..a216c6bab0
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/gpio.c
@@ -0,0 +1,212 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <southbridge/intel/common/gpio.h>
+
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
+	.gpio0 = GPIO_MODE_GPIO,
+	.gpio1 = GPIO_MODE_GPIO,
+	.gpio2 = GPIO_MODE_GPIO,
+	.gpio3 = GPIO_MODE_GPIO,
+	.gpio4 = GPIO_MODE_GPIO,
+	.gpio5 = GPIO_MODE_GPIO,
+	.gpio6 = GPIO_MODE_GPIO,
+	.gpio7 = GPIO_MODE_GPIO,
+	.gpio8 = GPIO_MODE_GPIO,
+	.gpio9 = GPIO_MODE_NATIVE,
+	.gpio10 = GPIO_MODE_GPIO,
+	.gpio11 = GPIO_MODE_NATIVE,
+	.gpio12 = GPIO_MODE_NATIVE,
+	.gpio13 = GPIO_MODE_GPIO,
+	.gpio14 = GPIO_MODE_NATIVE,
+	.gpio15 = GPIO_MODE_GPIO,
+	.gpio16 = GPIO_MODE_GPIO,
+	.gpio17 = GPIO_MODE_GPIO,
+	.gpio18 = GPIO_MODE_NATIVE,
+	.gpio19 = GPIO_MODE_GPIO,
+	.gpio20 = GPIO_MODE_NATIVE,
+	.gpio21 = GPIO_MODE_GPIO,
+	.gpio22 = GPIO_MODE_GPIO,
+	.gpio23 = GPIO_MODE_NATIVE,
+	.gpio24 = GPIO_MODE_GPIO,
+	.gpio25 = GPIO_MODE_NATIVE,
+	.gpio26 = GPIO_MODE_GPIO,
+	.gpio27 = GPIO_MODE_GPIO,
+	.gpio28 = GPIO_MODE_GPIO,
+	.gpio29 = GPIO_MODE_GPIO,
+	.gpio30 = GPIO_MODE_NATIVE,
+	.gpio31 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
+	.gpio0 = GPIO_DIR_INPUT,
+	.gpio1 = GPIO_DIR_INPUT,
+	.gpio2 = GPIO_DIR_INPUT,
+	.gpio3 = GPIO_DIR_INPUT,
+	.gpio4 = GPIO_DIR_INPUT,
+	.gpio5 = GPIO_DIR_INPUT,
+	.gpio6 = GPIO_DIR_INPUT,
+	.gpio7 = GPIO_DIR_INPUT,
+	.gpio8 = GPIO_DIR_OUTPUT,
+	.gpio10 = GPIO_DIR_OUTPUT,
+	.gpio13 = GPIO_DIR_INPUT,
+	.gpio15 = GPIO_DIR_OUTPUT,
+	.gpio16 = GPIO_DIR_INPUT,
+	.gpio17 = GPIO_DIR_INPUT,
+	.gpio19 = GPIO_DIR_INPUT,
+	.gpio21 = GPIO_DIR_INPUT,
+	.gpio22 = GPIO_DIR_OUTPUT,
+	.gpio24 = GPIO_DIR_OUTPUT,
+	.gpio26 = GPIO_DIR_INPUT,
+	.gpio27 = GPIO_DIR_INPUT,
+	.gpio28 = GPIO_DIR_OUTPUT,
+	.gpio29 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
+	.gpio8 = GPIO_LEVEL_LOW,
+	.gpio10 = GPIO_LEVEL_HIGH,
+	.gpio15 = GPIO_LEVEL_LOW,
+	.gpio22 = GPIO_LEVEL_HIGH,
+	.gpio24 = GPIO_LEVEL_LOW,
+	.gpio28 = GPIO_LEVEL_LOW,
+	.gpio29 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
+	.gpio24 = GPIO_RESET_RSMRST,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
+	.gpio1 = GPIO_INVERT,
+	.gpio6 = GPIO_INVERT,
+	.gpio13 = GPIO_INVERT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
+	.gpio32 = GPIO_MODE_NATIVE,
+	.gpio33 = GPIO_MODE_GPIO,
+	.gpio34 = GPIO_MODE_GPIO,
+	.gpio35 = GPIO_MODE_GPIO,
+	.gpio36 = GPIO_MODE_GPIO,
+	.gpio37 = GPIO_MODE_GPIO,
+	.gpio38 = GPIO_MODE_GPIO,
+	.gpio39 = GPIO_MODE_GPIO,
+	.gpio40 = GPIO_MODE_NATIVE,
+	.gpio41 = GPIO_MODE_NATIVE,
+	.gpio42 = GPIO_MODE_NATIVE,
+	.gpio43 = GPIO_MODE_GPIO,
+	.gpio44 = GPIO_MODE_GPIO,
+	.gpio45 = GPIO_MODE_GPIO,
+	.gpio46 = GPIO_MODE_NATIVE,
+	.gpio47 = GPIO_MODE_GPIO,
+	.gpio48 = GPIO_MODE_GPIO,
+	.gpio49 = GPIO_MODE_GPIO,
+	.gpio50 = GPIO_MODE_GPIO,
+	.gpio51 = GPIO_MODE_GPIO,
+	.gpio52 = GPIO_MODE_GPIO,
+	.gpio53 = GPIO_MODE_GPIO,
+	.gpio54 = GPIO_MODE_GPIO,
+	.gpio55 = GPIO_MODE_GPIO,
+	.gpio56 = GPIO_MODE_GPIO,
+	.gpio57 = GPIO_MODE_GPIO,
+	.gpio58 = GPIO_MODE_NATIVE,
+	.gpio59 = GPIO_MODE_NATIVE,
+	.gpio60 = GPIO_MODE_NATIVE,
+	.gpio61 = GPIO_MODE_NATIVE,
+	.gpio62 = GPIO_MODE_NATIVE,
+	.gpio63 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
+	.gpio33 = GPIO_DIR_OUTPUT,
+	.gpio34 = GPIO_DIR_INPUT,
+	.gpio35 = GPIO_DIR_INPUT,
+	.gpio36 = GPIO_DIR_INPUT,
+	.gpio37 = GPIO_DIR_INPUT,
+	.gpio38 = GPIO_DIR_INPUT,
+	.gpio39 = GPIO_DIR_INPUT,
+	.gpio43 = GPIO_DIR_OUTPUT,
+	.gpio44 = GPIO_DIR_INPUT,
+	.gpio45 = GPIO_DIR_INPUT,
+	.gpio47 = GPIO_DIR_INPUT,
+	.gpio48 = GPIO_DIR_INPUT,
+	.gpio49 = GPIO_DIR_INPUT,
+	.gpio50 = GPIO_DIR_INPUT,
+	.gpio51 = GPIO_DIR_OUTPUT,
+	.gpio52 = GPIO_DIR_OUTPUT,
+	.gpio53 = GPIO_DIR_OUTPUT,
+	.gpio54 = GPIO_DIR_INPUT,
+	.gpio55 = GPIO_DIR_OUTPUT,
+	.gpio56 = GPIO_DIR_INPUT,
+	.gpio57 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
+	.gpio33 = GPIO_LEVEL_HIGH,
+	.gpio43 = GPIO_LEVEL_HIGH,
+	.gpio51 = GPIO_LEVEL_HIGH,
+	.gpio52 = GPIO_LEVEL_HIGH,
+	.gpio53 = GPIO_LEVEL_HIGH,
+	.gpio55 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
+	.gpio64 = GPIO_MODE_GPIO,
+	.gpio65 = GPIO_MODE_GPIO,
+	.gpio66 = GPIO_MODE_GPIO,
+	.gpio67 = GPIO_MODE_GPIO,
+	.gpio68 = GPIO_MODE_GPIO,
+	.gpio69 = GPIO_MODE_GPIO,
+	.gpio70 = GPIO_MODE_GPIO,
+	.gpio71 = GPIO_MODE_GPIO,
+	.gpio72 = GPIO_MODE_NATIVE,
+	.gpio73 = GPIO_MODE_NATIVE,
+	.gpio74 = GPIO_MODE_NATIVE,
+	.gpio75 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
+	.gpio64 = GPIO_DIR_INPUT,
+	.gpio65 = GPIO_DIR_INPUT,
+	.gpio66 = GPIO_DIR_INPUT,
+	.gpio67 = GPIO_DIR_INPUT,
+	.gpio68 = GPIO_DIR_INPUT,
+	.gpio69 = GPIO_DIR_INPUT,
+	.gpio70 = GPIO_DIR_INPUT,
+	.gpio71 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
+};
+
+const struct pch_gpio_map mainboard_gpio_map = {
+	.set1 = {
+		.mode		= &pch_gpio_set1_mode,
+		.direction	= &pch_gpio_set1_direction,
+		.level		= &pch_gpio_set1_level,
+		.blink		= &pch_gpio_set1_blink,
+		.invert		= &pch_gpio_set1_invert,
+		.reset		= &pch_gpio_set1_reset,
+	},
+	.set2 = {
+		.mode		= &pch_gpio_set2_mode,
+		.direction	= &pch_gpio_set2_direction,
+		.level		= &pch_gpio_set2_level,
+		.reset		= &pch_gpio_set2_reset,
+	},
+	.set3 = {
+		.mode		= &pch_gpio_set3_mode,
+		.direction	= &pch_gpio_set3_direction,
+		.level		= &pch_gpio_set3_level,
+		.reset		= &pch_gpio_set3_reset,
+	},
+};
diff --git a/src/mainboard/lenovo/x230/variants/x230s/hda_verb.c b/src/mainboard/lenovo/x230/variants/x230s/hda_verb.c
new file mode 100644
index 0000000000..77919041e5
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/hda_verb.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	0x10ec0269,	/* Codec Vendor / Device ID: Realtek */
+	0x17aa2209,	/* Subsystem ID */
+	11,		/* Number of 4 dword sets */
+	AZALIA_SUBVENDOR(0, 0x17aa2209),
+	AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
+	AZALIA_PIN_CFG(0, 0x14, 0x90170110),
+	AZALIA_PIN_CFG(0, 0x15, 0x03211020),
+	AZALIA_PIN_CFG(0, 0x17, 0x40008000),
+	AZALIA_PIN_CFG(0, 0x18, 0x03a11030),
+	AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x40f38205),
+	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
+
+	0x80862806,	/* Codec Vendor / Device ID: Intel */
+	0x80860101,	/* Subsystem ID */
+	4,		/* Number of 4 dword sets */
+	AZALIA_SUBVENDOR(3, 0x80860101),
+	AZALIA_PIN_CFG(3, 0x05, 0x18560010),
+	AZALIA_PIN_CFG(3, 0x06, 0x58560020),
+	AZALIA_PIN_CFG(3, 0x07, 0x58560030),
+
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb
new file mode 100644
index 0000000000..ed1dd3c3b4
--- /dev/null
+++ b/src/mainboard/lenovo/x230/variants/x230s/overridetree.cb
@@ -0,0 +1,36 @@
+chip northbridge/intel/sandybridge
+	# Enable DisplayPort Hotplug with 6ms pulse
+	register "gpu_dp_b_hotplug" = "4"
+	register "gpu_dp_c_hotplug" = "4"
+	register "gpu_dp_d_hotplug" = "4"
+
+	# Enable Panel as eDP and configure power delays
+	register "gpu_panel_port_select" = "1"			# eDP
+	register "gpu_panel_power_backlight_off_delay" = "1"	# 0.1ms
+	register "gpu_panel_power_backlight_on_delay" = "1"	# 0.1ms
+	register "gpu_panel_power_down_delay" = "500" 		# 50ms
+	register "gpu_panel_power_up_delay" = "2000"		# 200ms
+
+	device domain 0x0 on
+		subsystemid 0x17aa 0x2209 inherit
+		chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
+			register "c2_latency" = "0x0065"
+			# X230s does not support docking
+			register "docking_supported" = "0"
+			register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
+			# Enable SATA ports 0 (HDD bay) & 1 (WWAN M.2 SATA)
+			register "sata_port_map" = "0x3"
+
+			device pci 1f.0 on # LPC bridge
+				chip ec/lenovo/h8 #
+					register "config1" = "0x05"
+					register "config3" = "0xc4"
+					register "event5_enable" = "0x3c"
+					register "evente_enable" = "0x1d"
+					# X230s only has BT on wlan card
+					register "has_bdc_detection" = "0"
+				end
+			end # LPC Controller
+		end
+	end
+end