diff options
| author | Gerd Hoffmann <kraxel@redhat.com> | 2016-06-16 08:19:59 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-06-21 00:35:32 +0200 |
| commit | 633c57d1d1ab3b2241fd259e12423054527ee000 (patch) | |
| tree | a0660b378457e228c2776859c1448e250d5ce4fd /src/mainboard | |
| parent | 710566093a504f0fecb641661c5379cad268189b (diff) | |
qemu/x86: car: drop pointless code, move stack out of the way
RAM doesn't need any initialization on qemu, so we can simply use it
right away. No need to try using the cache as ram in the first place.
We also can place the stack in normal ram right from start and we
don't have to switch it to another place later on. Place the stack
in real mode memory which isn't used for something else.
Change-Id: Ib7a3f58a846d139f7babea5f43722a30fe0fe962
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-on: https://review.coreboot.org/15214
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc | 25 |
1 files changed, 11 insertions, 14 deletions
diff --git a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc index 297eaf130a..d36341c78b 100644 --- a/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc +++ b/src/mainboard/emulation/qemu-i440fx/cache_as_ram.inc @@ -18,9 +18,6 @@ #include <cpu/x86/cache.h> #include <cpu/x86/post_code.h> -#define CACHE_AS_RAM_SIZE 0x10000 -#define CACHE_AS_RAM_BASE 0xd0000 - #define CPU_PHYSMASK_HI (1 << (CONFIG_CPU_ADDR_BITS - 32) - 1) /* Save the BIST result. */ @@ -28,17 +25,19 @@ cache_as_ram: post_code(0x20) - /* Clear the cache memory region. This will also fill up the cache */ - movl $CACHE_AS_RAM_BASE, %esi - movl %esi, %edi - movl $(CACHE_AS_RAM_SIZE >> 2), %ecx - // movl $0x23322332, %eax - xorl %eax, %eax - rep stosl + /* + * Nothing to do here on qemu, RAM works just fine without any + * initialization. + */ post_code(0x21) - /* Set up the stack pointer. */ - movl $(CACHE_AS_RAM_SIZE + CACHE_AS_RAM_BASE - 4), %eax + /* + * Set up the stack pointer, use top of real mode (640k) memory. + * This value also keeps the copy_and_run stack out of the way + * of big ramstages. The ramstage will load its own %esp so + * there is no harm in using this value. + */ + movl $0xa0000, %eax movl %eax, %esp /* Restore the BIST result. */ @@ -57,8 +56,6 @@ __main: post_code(POST_PREPARE_RAMSTAGE) cld /* Clear direction flag. */ - movl $CONFIG_RAMTOP, %esp - movl %esp, %ebp call copy_and_run .Lhlt: |