diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-10-08 09:21:19 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-28 09:16:49 +0000 |
| commit | 6245d076b96cfdddbea6bcc21ed9f0fba222b928 (patch) | |
| tree | 7c6b12f923dc949d3e6d66454e155f6c1fdd1844 /src/mainboard | |
| parent | fda6e6f3054591e17e20bf8431762181823e5320 (diff) | |
mb/emulation/qemu-q35: Convert to ASL 2.0 syntax
Generated 'build/dsdt.dsl' files are identical.
Change-Id: I4e0f64def6c4c712793d3b2ede99dd74f9046fcb
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46163
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/emulation/qemu-q35/dsdt.asl | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/src/mainboard/emulation/qemu-q35/dsdt.asl b/src/mainboard/emulation/qemu-q35/dsdt.asl index 494e296100..3a9e571ac2 100644 --- a/src/mainboard/emulation/qemu-q35/dsdt.asl +++ b/src/mainboard/emulation/qemu-q35/dsdt.asl @@ -46,31 +46,31 @@ DefinitionBlock ( CreateDWordField(Arg3, 0, CDW1) // Check for proper UUID - If (LEqual(Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))) { + If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")) { // Create DWORD-addressable fields from the Capabilities Buffer CreateDWordField(Arg3, 4, CDW2) CreateDWordField(Arg3, 8, CDW3) // Save Capabilities DWORD2 & 3 - Store(CDW2, SUPP) - Store(CDW3, CTRL) + SUPP = CDW2 + CTRL = CDW3 // Always allow native PME, AER (no dependencies) // Never allow SHPC (no SHPC controller in this system) - And(CTRL, 0x1D, CTRL) + CTRL &= 0x1D - If (LNotEqual(Arg1, One)) { + If (Arg1 != 1) { // Unknown revision - Or(CDW1, 0x08, CDW1) + CDW1 |= 0x08 } - If (LNotEqual(CDW3, CTRL)) { + If (CDW3 != CTRL) { // Capabilities bits were masked - Or(CDW1, 0x10, CDW1) + CDW1 |= 0x10 } // Update DWORD3 in the buffer - Store(CTRL, CDW3) + CDW3 = CTRL } Else { - Or(CDW1, 4, CDW1) // Unrecognized UUID + CDW1 |= 4 // Unrecognized UUID } Return (Arg3) } @@ -145,7 +145,7 @@ DefinitionBlock ( /* Zero => PIC mode, One => APIC Mode */ Name(\PICF, Zero) Method(\_PIC, 1, NotSerialized) { - Store(Arg0, \PICF) + \PICF = Arg0 } Scope(\_SB) { @@ -269,7 +269,7 @@ DefinitionBlock ( section 6.2.8.1 */ /* Note: we provide the same info as the PCI routing table of the Bochs BIOS */ - If (LEqual(\PICF, Zero)) { + If (\PICF == 0) { Return (PRTP) } Else { Return (PRTA) @@ -292,7 +292,7 @@ DefinitionBlock ( Method(IQST, 1, NotSerialized) { // _STA method - get status - If (And(0x80, Arg0)) { + If (0x80 & Arg0) { Return (0x09) } Return (0x0B) @@ -303,7 +303,7 @@ DefinitionBlock ( Interrupt(, Level, ActiveHigh, Shared) { 0 } }) CreateDWordField(PRR0, 0x05, PRRI) - Store(And(Arg0, 0x0F), PRRI) + PRRI = Arg0 & 0x0F Return (PRR0) } @@ -320,14 +320,14 @@ DefinitionBlock ( Return (IQST(reg)) \ } \ Method(_DIS, 0, NotSerialized) { \ - Or(reg, 0x80, reg) \ + reg |= 0x80 \ } \ Method(_CRS, 0, NotSerialized) { \ Return (IQCR(reg)) \ } \ Method(_SRS, 1, NotSerialized) { \ CreateDWordField(Arg0, 0x05, PRRI) \ - Store(PRRI, reg) \ + reg = PRRI \ } \ } |