diff options
| author | Martin Roth <martinroth@chromium.org> | 2021-05-20 16:06:13 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-06-17 19:24:32 +0000 |
| commit | 57bc814ea1166c5c86781e6f8d93ca2ab85c2aa9 (patch) | |
| tree | 2c29db6e9b5a6dcf45e78c7e5859449a4ec5b75b /src/mainboard | |
| parent | dac1f66c6c889962e355277570f9c36b747eec8a (diff) | |
mb/google/guybrush: Add helpers for cbi fw_config settings
Turn on CBI and add helper functions for determining the board
configuration from the firmware config settings in CBI.
BUG=b:187316460
TEST=Built
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I212e7f413b4d8a7d15122cde90100a0ec28e88a6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54639
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
5 files changed, 31 insertions, 7 deletions
diff --git a/src/mainboard/google/guybrush/Kconfig b/src/mainboard/google/guybrush/Kconfig index 14ab695caf..13067eebfa 100644 --- a/src/mainboard/google/guybrush/Kconfig +++ b/src/mainboard/google/guybrush/Kconfig @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS select ELOG select ELOG_GSMI select FW_CONFIG + select FW_CONFIG_SOURCE_CHROMEEC_CBI select GOOGLE_SMBIOS_MAINBOARD_VERSION select HAVE_ACPI_RESUME select HAVE_EM100_SUPPORT diff --git a/src/mainboard/google/guybrush/variants/baseboard/Makefile.inc b/src/mainboard/google/guybrush/variants/baseboard/Makefile.inc index 88aa1a4ee5..e6a64a8dca 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/guybrush/variants/baseboard/Makefile.inc @@ -1,9 +1,11 @@ bootblock-y += gpio.c bootblock-y += helpers.c +romstage-y += helpers.c romstage-y += tpm_tis.c ramstage-y += gpio.c +ramstage-y += helpers.c ramstage-y += tpm_tis.c verstage-y += gpio.c diff --git a/src/mainboard/google/guybrush/variants/baseboard/helpers.c b/src/mainboard/google/guybrush/variants/baseboard/helpers.c index b0cca28983..5297a4925b 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/helpers.c +++ b/src/mainboard/google/guybrush/variants/baseboard/helpers.c @@ -2,11 +2,20 @@ #include <baseboard/variants.h> #include <device/device.h> +#include <fw_config.h> #include <soc/iomap.h> +#include <soc/pci_devs.h> -bool variant_has_fpmcu(void) +static bool variant_has_device_enabled(const struct device_path *device_path, size_t path_length) +{ + const struct device *dev = + find_dev_nested_path(all_devices->link_list, device_path, path_length); + + return is_dev_enabled(dev); +} + +__weak bool variant_has_fpmcu(void) { - DEVTREE_CONST struct device *mmio_dev = NULL; static const struct device_path fpmcu_path[] = { { .type = DEVICE_PATH_MMIO, @@ -18,11 +27,18 @@ bool variant_has_fpmcu(void) .generic.subid = 0 }, }; - mmio_dev = find_dev_nested_path( - all_devices->link_list, fpmcu_path, ARRAY_SIZE(fpmcu_path)); - if (mmio_dev == NULL) - return false; + return variant_has_device_enabled(fpmcu_path, ARRAY_SIZE(fpmcu_path)); +} + +__weak bool variant_has_pcie_wwan(void) +{ + static const struct device_path pcie_wwan_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_GPP_2_2_DEVFN, + }, + }; - return mmio_dev->enabled; + return variant_has_device_enabled(pcie_wwan_path, ARRAY_SIZE(pcie_wwan_path)); } diff --git a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h index 5fb746291b..37ee241017 100644 --- a/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h @@ -28,4 +28,6 @@ void variant_fpmcu_reset(void); bool variant_has_fpmcu(void); +bool variant_has_pcie_wwan(void); + #endif /* __BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb index 97a1afd0fe..42e612803e 100644 --- a/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/guybrush/overridetree.cb @@ -33,6 +33,9 @@ end chip soc/amd/cezanne device domain 0 on + device ref gpp_bridge_2 on + probe WWAN WWAN_FM350GL + end # WWAN end # domain register "slow_ppt_limit_mW" = "25000" |