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authorJohn Su <john_su@compal.corp-partner.google.com>2020-09-01 17:59:45 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-09-14 07:08:56 +0000
commit47c4bf557113f20f8fbf9878d44697694a99d439 (patch)
treedf6ad316eb023e0c14c86e5950f095225f66fa52 /src/mainboard
parent5f027fa4c227c9788a4b7d88d3bdf3891ed6d844 (diff)
mb/google/octopus/variants/fleex: Add G2Touch touchscreen support
BUG=b:167297664 BRANCH=octopus TEST=build fleex, and check touchscreen can work Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Change-Id: I910681c258ff5487830e795a8bd08c66be69b1d4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44980 Reviewed-by: Justin TerAvest <teravest@google.com> Reviewed-by: Justin TerAvest <teravest@chromium.org> Reviewed-by: Marco Chen <marcochen@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Henry Sun <henrysun@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/octopus/variants/fleex/overridetree.cb14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
index 1d1a67ad33..0b81752f72 100644
--- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb
+++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb
@@ -156,6 +156,20 @@ chip soc/intel/apollolake
register "hid_desc_reg_offset" = "0x20"
device i2c 2c on end
end
+ chip drivers/i2c/hid
+ register "generic.hid" = ""GTCH7503""
+ register "generic.desc" = ""G2TOUCH Touchscreen""
+ register "generic.irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)"
+ register "generic.probed" = "1"
+ register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)"
+ register "generic.reset_delay_ms" = "50"
+ register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)"
+ register "generic.enable_delay_ms" = "1"
+ register "generic.has_power_resource" = "1"
+ register "generic.disable_gpio_export_in_crs" = "1"
+ register "hid_desc_reg_offset" = "0x01"
+ device i2c 40 on end
+ end
end # - I2C 7
end