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authorJulius Werner <jwerner@chromium.org>2013-08-12 18:04:06 -0700
committerIsaac Christensen <isaac.christensen@se-eng.com>2014-08-08 17:41:46 +0200
commit45d2ff317c0c077e6f83602a81bc915aa195d3f7 (patch)
treedb47cedcf89a2802c69c11079cba1c844dab9722 /src/mainboard
parent782ac36cfac8be208f0d1221f6586375e1b8c574 (diff)
exynos5420: Implement support to boot with USB A-A firmware upload
This patch ports the USB A-A firmware upload functionality from exynos5250 over to exynos5420. Essentially just like a conflictless cherry-pick of 9e69421f5f0eebf88c09913dee90082feab2856c. It also fixes the exact same bug with SPI initialization for Pit and Kirby. Old-Change-Id: Ief0ed54c0beb2701e51201041f9bc426b2167747 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65751 Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 5dff43f929478f83939221df13b961a69f89b132) exynos5: Fix trivial style nits A few curly braces on the wrong line. Old-Change-Id: I4ddac4476c6509dc1716e8c1915fbdb67d346786 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66153 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> (cherry picked from commit 41e3fd9eaafe36433723f4e96a6d94c04e5fbafb) Squashed two related commits. Change-Id: I22d579693b5e7270aacb45bbe3557e40893dd1f8 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6500 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/pit/romstage.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 7037112d04..319ebf97e2 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -278,6 +278,7 @@ void main(void)
/* Set SPI (primary CBFS media) clock to 50MHz. */
/* if this is uncommented SPI will not work correctly. */
clock_set_rate(PERIPH_ID_SPI1, 50000000);
+ exynos_pinmux_spi1();
simple_spi_test();
cbmem_initialize_empty();