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authorPhilipp Deppenwiese <zaolin@das-labor.org>2015-06-03 23:09:36 +0200
committerPatrick Georgi <pgeorgi@google.com>2015-06-05 12:30:32 +0200
commit3d02b9c79e8dbe661c9e784519c486b8897b6af5 (patch)
treeba6bbf481e19f9f206ba9ecb0a95ee0533238c5f /src/mainboard
parent09705ab72457423fc88672cda932f474fee0cfbe (diff)
mainboard/lenovo/{t430s,t420s,t520,t530,x220}: Add TPM 1.2 mainboard support
Every Lenovo Thinkpad includes a Trusted Platform Module, so we can enable it for the sandy-/ivybridge platforms. Change-Id: Icda443ba88c2a49a0033014ce7710dd607fa15dc Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-on: http://review.coreboot.org/10411 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/lenovo/t420s/Kconfig1
-rw-r--r--src/mainboard/lenovo/t420s/devicetree.cb4
-rw-r--r--src/mainboard/lenovo/t420s/dsdt.asl8
-rw-r--r--src/mainboard/lenovo/t430s/Kconfig1
-rw-r--r--src/mainboard/lenovo/t430s/devicetree.cb4
-rw-r--r--src/mainboard/lenovo/t430s/dsdt.asl8
-rw-r--r--src/mainboard/lenovo/t520/Kconfig1
-rw-r--r--src/mainboard/lenovo/t520/devicetree.cb4
-rw-r--r--src/mainboard/lenovo/t520/dsdt.asl8
-rw-r--r--src/mainboard/lenovo/t530/Kconfig1
-rw-r--r--src/mainboard/lenovo/t530/devicetree.cb4
-rw-r--r--src/mainboard/lenovo/t530/dsdt.asl8
-rw-r--r--src/mainboard/lenovo/x220/Kconfig1
-rw-r--r--src/mainboard/lenovo/x220/devicetree.cb4
-rw-r--r--src/mainboard/lenovo/x220/dsdt.asl8
15 files changed, 65 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig
index be18eb0a76..47e70d60e7 100644
--- a/src/mainboard/lenovo/t420s/Kconfig
+++ b/src/mainboard/lenovo/t420s/Kconfig
@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
select SANDYBRIDGE_LVDS
+ select MAINBOARD_HAS_LPC_TPM
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb
index 0385e83ee5..cd7022850c 100644
--- a/src/mainboard/lenovo/t420s/devicetree.cb
+++ b/src/mainboard/lenovo/t420s/devicetree.cb
@@ -112,6 +112,10 @@ chip northbridge/intel/sandybridge
register "dock_event_enable" = "0x01"
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+
chip ec/lenovo/h8
device pnp ff.2 on # dummy
io 0x60 = 0x62
diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl
index b40b6dbc5b..27dcf54d99 100644
--- a/src/mainboard/lenovo/t420s/dsdt.asl
+++ b/src/mainboard/lenovo/t420s/dsdt.asl
@@ -53,6 +53,14 @@ DefinitionBlock(
}
}
+ /*
+ * LPC Trusted Platform Module
+ */
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+ }
+
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
}
diff --git a/src/mainboard/lenovo/t430s/Kconfig b/src/mainboard/lenovo/t430s/Kconfig
index dbe08b5c29..0769466467 100644
--- a/src/mainboard/lenovo/t430s/Kconfig
+++ b/src/mainboard/lenovo/t430s/Kconfig
@@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
select IVYBRIDGE_LVDS
select ENABLE_VMX
+ select MAINBOARD_HAS_LPC_TPM
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb
index 54e763e15d..f3e453e089 100644
--- a/src/mainboard/lenovo/t430s/devicetree.cb
+++ b/src/mainboard/lenovo/t430s/devicetree.cb
@@ -116,6 +116,10 @@ chip northbridge/intel/sandybridge
register "dock_event_enable" = "0x01"
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+
chip ec/lenovo/h8
device pnp ff.2 on # dummy
io 0x60 = 0x62
diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl
index b40b6dbc5b..27dcf54d99 100644
--- a/src/mainboard/lenovo/t430s/dsdt.asl
+++ b/src/mainboard/lenovo/t430s/dsdt.asl
@@ -53,6 +53,14 @@ DefinitionBlock(
}
}
+ /*
+ * LPC Trusted Platform Module
+ */
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+ }
+
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
}
diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig
index 98355d41b6..56fa395b28 100644
--- a/src/mainboard/lenovo/t520/Kconfig
+++ b/src/mainboard/lenovo/t520/Kconfig
@@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
select SANDYBRIDGE_LVDS
+ select MAINBOARD_HAS_LPC_TPM
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb
index 4c396e2645..ff9745ef1c 100644
--- a/src/mainboard/lenovo/t520/devicetree.cb
+++ b/src/mainboard/lenovo/t520/devicetree.cb
@@ -93,6 +93,10 @@ chip northbridge/intel/sandybridge
register "dock_event_enable" = "0x01"
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+
chip ec/lenovo/h8
device pnp ff.2 on # dummy
io 0x60 = 0x62
diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl
index 42165a10bd..c8591a4fd3 100644
--- a/src/mainboard/lenovo/t520/dsdt.asl
+++ b/src/mainboard/lenovo/t520/dsdt.asl
@@ -52,6 +52,14 @@ DefinitionBlock(
}
}
+ /*
+ * LPC Trusted Platform Module
+ */
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+ }
+
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
}
diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig
index 2dcfa90e35..f144afb77b 100644
--- a/src/mainboard/lenovo/t530/Kconfig
+++ b/src/mainboard/lenovo/t530/Kconfig
@@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select IVYBRIDGE_LVDS
select MAINBOARD_DO_NATIVE_VGA_INIT # default to native vga init
select ENABLE_VMX
+ select MAINBOARD_HAS_LPC_TPM
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb
index 09c8b439af..e1b22fdb84 100644
--- a/src/mainboard/lenovo/t530/devicetree.cb
+++ b/src/mainboard/lenovo/t530/devicetree.cb
@@ -98,6 +98,10 @@ chip northbridge/intel/sandybridge
register "dock_event_enable" = "0x01"
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+
chip ec/lenovo/h8
device pnp ff.2 on # dummy
io 0x60 = 0x62
diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl
index 42165a10bd..c8591a4fd3 100644
--- a/src/mainboard/lenovo/t530/dsdt.asl
+++ b/src/mainboard/lenovo/t530/dsdt.asl
@@ -52,6 +52,14 @@ DefinitionBlock(
}
}
+ /*
+ * LPC Trusted Platform Module
+ */
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+ }
+
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
}
diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig
index 006388f433..9fa95b917b 100644
--- a/src/mainboard/lenovo/x220/Kconfig
+++ b/src/mainboard/lenovo/x220/Kconfig
@@ -21,6 +21,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG
select SANDYBRIDGE_LVDS
select DRIVERS_RICOH_RCE822
+ select MAINBOARD_HAS_LPC_TPM
# Workaround for EC/KBC IRQ1.
select SERIRQ_CONTINUOUS_MODE
diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb
index e9a417844c..9c3aac661a 100644
--- a/src/mainboard/lenovo/x220/devicetree.cb
+++ b/src/mainboard/lenovo/x220/devicetree.cb
@@ -126,6 +126,10 @@ chip northbridge/intel/sandybridge
register "dock_event_enable" = "0x01"
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+
chip ec/lenovo/h8
device pnp ff.2 on # dummy
io 0x60 = 0x62
diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl
index 42165a10bd..c8591a4fd3 100644
--- a/src/mainboard/lenovo/x220/dsdt.asl
+++ b/src/mainboard/lenovo/x220/dsdt.asl
@@ -52,6 +52,14 @@ DefinitionBlock(
}
}
+ /*
+ * LPC Trusted Platform Module
+ */
+ Scope (\_SB.PCI0.LPCB)
+ {
+ #include <drivers/pc80/tpm/acpi/tpm.asl>
+ }
+
/* Chipset specific sleep states */
#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
}